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1 vote
1 answer
70 views

I am working on an embedded RTOS system for a 32-bit MIPS SOC, which supports DWC2 OTG. (It can run Linux well.) I ported an open-source USB stack to this system by following the porting guidance. ...
wangt13's user avatar
  • 1,317
1 vote
0 answers
52 views

I have an ELF file (more specifically, a 32-bit MIPS-III statically linked one). The code in it starts with something like: entry: 00100008 28 0c 00 70 clear at 0010000c 28 14 00 70 clear ...
Behrad Sharifi's user avatar
2 votes
2 answers
152 views

In my project, I have written my own implementation of the higher levels of the Itanium abi (__cxa_throw, etc). However, when it came to stack unwinding, I decided that this would be too much for me ...
Jade Marker's user avatar
-3 votes
1 answer
116 views

I have a question regarding these two instructions: lw r2, 10(r1) lw r1, 10(r2) Is there a hazard here, do I need stalls in between two of them? I want to know if any kind of hazard happens here? I ...
mer mer's user avatar
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0 votes
0 answers
57 views

I'm doing homework, where the product of the numbers between two points (first and last) in an array is meant to be placed in register $v0. All the autotest results from github I have been able to get ...
James's user avatar
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-3 votes
1 answer
113 views

I'm currently learning MIPS assembly and trying to understand how to create loops. I understand basic instructions like add, sub, and li, but I'm not sure how to implement a loop structure similar to ...
Rana Alshakarchi's user avatar
0 votes
0 answers
26 views

New to mips, so some of the text or formatting is from the professors instructions. Trying to translate the following C-Code into Mips Assembly language using Qtspim and Notepad a=0 for(i=0;i<10;i++...
unit5016's user avatar
1 vote
1 answer
195 views

This MIPS assembly program shown below is meant to count the number of characters in a string. This program was written using the MARS MIPS simulator (available from https://dpetersanderson.github.io/...
smilingbuddha's user avatar
0 votes
0 answers
63 views

slt $t2, $t5, $t0 <---- 0x04001248 (PC) [Memory Address] bne $t2, $s4, ELSE lw $s4, 120($s1) j DONE ELSE: addi $t2, $t2, -100 DONE: nop Assume this is the example. What ...
Adriel Orlando Johan's user avatar
0 votes
2 answers
45 views

I am trying to implement logical not in MIPS. I have read several suggestions that I implement it by nor $T1, $T1, $T1 or nor $T1, $T1, $0. The spec seems to support this working, but when I nor 1 ...
tarski's user avatar
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2 votes
0 answers
95 views

.data li $s0, 4 #upper limit li $s1, 0 #counter .text main: bgt $s1, $s0, end # Branch to 'end' if $s1 = $s0 move $a0, $s1 # Move the value of $s0 to $a0 (argument ...
Theo's user avatar
  • 21
2 votes
1 answer
106 views

I have the following code in nanoMips: loop: lw $t1, A($t0) lw $t2, B($t0) sub $t3, $t1, $t2 beq $t3, $r0, else sw $t2, A($t0) b end The exercise asks me to implement the no-taken branch prediction ...
papitas's user avatar
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0 votes
1 answer
170 views

I have a MIPS based broadcom chip BCM68380 which I am trying to program by following cmm script. SYSTEM.RESET SYSTEM.CPU bcm63268 SYSTEM.OPTION ResBreak OFF SYSTEM.OPTION IMASKASM ON SYSTEM.OPTION ...
Harsh Bijwe's user avatar
0 votes
0 answers
29 views

I'm new to GCC and can't find the exact spec where its implementation is based. If my target machine's ISA is MIPS architecture, how could I find the MIPS spec which the GCC implementation is based on?...
GreatShannon's user avatar
1 vote
1 answer
121 views

I am working on an embedded Linux system (kernel-5.10.24) on a MIPS CPU, and now I am learning and test MIPS SIMD. I wrote a simple test to compare performance of normal functions like memcpy,memset ...
wangt13's user avatar
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