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I had a situation where a capacitor was installed in series instead of the intended resistor. When measuring with this cap in series it measured like 5 volts. When changing the cap to a 24-ohm resistor it read the 3.3V CLK signal as 3.3Volt (as it should since the CLK out signal was 3.3vdc peak to peak).

I am curious about how the cap could make the voltage increase in the circuit. I guess it has something to do with the cap charing up somehow... But should it not just discharge the energy when the CLK is "low" state?

Should it not take as long to charge as to discharge? Or is something else going on?... Does anyone have an explanation?

chip used for the clock

situation explained

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  • \$\begingroup\$ Your measurements are wrong? And what's peak-to-peak: 3.3VDC? How are you measuring? Are you using an oscilloscope? If so, can you post the scope shots? \$\endgroup\$ Commented Jun 19, 2022 at 18:25
  • \$\begingroup\$ clock in is 3.3VDC peak to peak. measuring between point indicated with a line and other probe to GND. I am using oscilloscope. I did not save any shot. \$\endgroup\$ Commented Jun 19, 2022 at 18:33
  • \$\begingroup\$ OK, the 3.3VDC peak to peak threw me because it's not VDC, it's a clock. And Andy has the right answer below, you're differentiating the clock. \$\endgroup\$ Commented Jun 19, 2022 at 18:49
  • \$\begingroup\$ Well it is VDC..just toggling between 3.3VDC and GND. Or will it be considered AC then? \$\endgroup\$ Commented Jun 19, 2022 at 19:22
  • \$\begingroup\$ I would consider it AC, DC usually refers to a steady or very slowly changing voltage like a power rail or reference. \$\endgroup\$ Commented Jun 19, 2022 at 19:28

1 Answer 1

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Does anyone have an explanation?

Yes, this is what will happen when a squarewave input is processed by an RC differentiator: -

enter image description here

The output vertical edges are constrained to an amplitude of 3.3 volts but, once an edge has occurred, \$V_{OUT}\$ fairly rapidly discharges to 0 volts due to the charging of the capacitor via the resistor. The next edge (of the opposite polarity) drives \$V_{OUT}\$ in the opposite direction.

The above picture is 10 kHz but, as frequency rises the p-p will tend to eventually become the same as the input waveform. At 100 kHz \$V_{OUT}\$ is about 5 volts p-p: -

enter image description here

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  • \$\begingroup\$ OK.. Why does it look in the lower (blue) picture like the volt is dropping when the red one is stil charged? And why does it go under 0 Volts? Should it not stop when reaching 0? the clock is toggling between 3.3 and 0 volts. So what drives it under 0V? "The next edge (of the opposite polarity) drives VOUT in the opposite direction." \$\endgroup\$ Commented Jun 19, 2022 at 19:16
  • \$\begingroup\$ Also the 10 is a pull-up and not in series. Thou there is a chip with an input pin to the right (not showed in my picture) that should have I guess 100 000k or something in input resistance (just guessing) between input and GND. \$\endgroup\$ Commented Jun 19, 2022 at 19:20
  • \$\begingroup\$ (1) The capacitor will pass unhindered all vertical input voltage edges through to the output whenever they occur (no matter what level the decaying part of the output waveform is. (2) Because it's a differentiator, the circuit behaves in terms of output p-p voltage the same whether the resistor is grounded or connected to 1,000,000 volts DC. The p-p will be unaltered. \$\endgroup\$ Commented Jun 19, 2022 at 19:23
  • \$\begingroup\$ Well.... after thinking it true a bit... I think I get it. After all: Since when the CLK is high we have a current into the CAP (that was uncharged) and that gives extra electrons on one of the cap's sides. Then it is logical that on the other side of the CAP we are pushing away electrons since the negative charge repels another negative charge. And when the CLK goes low (GND) then the electrons is rushing the other way. So the blue side of the graph is just trying to do the opposite as the red side does. One side is pushing in electrons and the other side is pushing out electrons. Got it =) \$\endgroup\$ Commented Jun 19, 2022 at 22:14
  • \$\begingroup\$ P.S. Thank you for your time and answer! \$\endgroup\$ Commented Jun 19, 2022 at 22:16

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