Lattice Semiconductor has launched a field-programmable gate array (FPGA) for secure control designed for the quantum computing era.
Lattice unveiled its Mach-N2 FPGA at an online press briefing on Sept. 15. The device features post-quantum cryptography (PQC), integrated flash memory and anti-tamper capabilities. Lattice has moved faster than AMD’s Xilinx and Altera in applying PQC to FPGAs.
Built on the Nexus 2 FPGA platform, Mach-N2 supports up to 220,000 system logic cells and performance of up to 350 MHz. It also provides high-speed interfaces including PCIe 4.0 and 10 Gigabit Ethernet.
An FPGA is a semiconductor whose internal circuitry can be reconfigured by users for specific applications. Its internal configuration can be updated to support PQC without replacing the hardware. Lattice applied Commercial National Security Algorithm Suite 2.0 (CNSA 2.0), a PQC standard set by the U.S. National Security Agency (NSA), to Mach-N2.
PQC is a security technology designed to protect against attacks using quantum computers. It employs cryptographic systems that are difficult to break even with quantum computing power. The industry expects quantum computers to pose a threat to national security within the next decade. Lattice expects FPGAs in data centers to require PQC support by 2033 at the latest.
PQC is expected to be required in infrastructure that needs high levels of security, including data centers and networking equipment. Lattice plans to supply Mach-N2 to the server market and is providing samples to hyperscalers for validation on customer boards. The company did not disclose a specific mass-production supply schedule due to nondisclosure agreements (NDAs).
Mach-N2 integrates nonvolatile flash memory inside the FPGA. Eliminating the need for external flash also reduces security threats through connections to external memory. The shorter physical distance enables a device with up to 220,000 system logic cells to boot in less than 30 milliseconds. Lattice said this is 10 times faster than competing products.
The FPGA also features anti-tamper capabilities to protect against physical manipulation. It immediately detects when voltage or temperature inside the FPGA moves outside preset ranges and alerts the user. Depending on predefined settings, the system can respond to an attack by rebooting or controlling components. Lattice designs the system according to customers’ required thresholds and response methods.
Lattice is also launching Lattice Prompt, an artificial intelligence (AI)-based FPGA design tool. Users can enter desired functions and performance requirements in natural language to generate code. Existing code written in languages such as C or Python can also be converted into register-transfer level (RTL) code used in FPGAs. Lattice said AI can reduce design work that previously took 120 days to less than 10 days.
The electronic design automation (EDA) industry is similarly incorporating AI into design tools. AI design tools from EDA companies use AI for verification as well as design, while Lattice Prompt leaves final verification to engineers. Lattice said it has “99% confidence” in designs produced by Lattice Prompt but that final verification remains the engineer’s responsibility. The approach focuses on using AI to assist engineers rather than replace them in the design process.
