Schematic
All Xilinx Artix 7 DocsProduct Overview
The Flagship FPGA Development Board
The Alchitry Pt V2 is a platinum-tier FPGA development board that has been engineered for high-speed performance and compact designs. The Pt V2 was designed with a low-profile backside, featuring no components taller than 1.5mm. This enables the use of high-speed 1.5mm stack-height DF40 connectors required by the high-speed GTP (gigabit transceiver port) capable of interfaces like PCIe 2.0.
Greater Performance with the Xilinx Artix-7 FPGA
At its core, the Alchitry Pt V2 is a powerhouse built for ambitious projects. It boasts:
- A massive 101,440 logic cells, three times the resources of the Au V2.
- 206 IO pins, nearly doubling the available amount on the Au V2.
- Equipped with 240 dedicated DSP48E1 slices, perfect for demanding computational tasks.
- 4,860 Kb of Block RAM Blocks, giving you the horsepower needed for complex applications like real-time signal processing and high-speed communication.
The Artix 7 FPGA requires a free license for Vivado. Click here for instructions on installing it.
Stackable Expansion
As part of the modular Alchitry ecosystem, the Pt stacks with expansion boards called "Elements" to add prototyping spaces, buttons, LEDs, and more. To make a proper physical connection with its high-speed connectors, the Pt requires a Br, Fn, or Sp Element when connecting to an Ft, Ft+, or Hd board. This prevents the connectors from contacting capacitors on the bottom of the Pt.
