Insight Sync Data’s Post

Let’s be honest for a moment about semiconductor manufacturing. We like to think we run extremely sophisticated processes. Thousands of tools, hundreds of steps, endless optimization. But if you strip it down to physics, the whole industry is doing just two things: we either put something on the wafer or remove something from it. That’s it. And yet, to do these two simple things, we built an entire universe of operations around them. We deposit, we etch — these are the only steps that actually change the product in a meaningful, irreversible way. This is where value is created. Everything else… exists because these steps are not perfect. Lithography, resist, hard masks, sacrificial layers — all of this is temporary. It helps us do the real work, but it doesn’t add value by itself. Then come cleaning steps, wet etch corrections, residue removal, rework — essentially fixing what we just did. And finally, metrology — measuring how badly (or not so badly) we performed. So the typical modern fab looks less like a value-generation machine and more like a very expensive system for compensating its own imperfections. And here is the uncomfortable part. We invest enormous effort into improving exactly those non-value operations. Better cleaning after etch. More precise corrections. More measurements. More control loops. More complexity. In other words, we are getting very good at managing waste. A different way to look at it is much simpler, and much harder at the same time. If an operation creates irreversible change, invest in it. Push physics, develop technology, put your best engineers there. If an operation exists only to support or fix, don’t improve it. Question it. Shrink it. Try to eliminate it. Improving cleaning after plasma etch is a comfortable engineering task. Improving plasma etch so that cleaning is no longer needed — that’s real engineering. The same applies to metrology. We treat it as a mandatory part of production, but in reality, it is just a reflection of our lack of confidence in the process. The better the physics, the less you need to measure. Ideally, metrology should support problem solving and innovation—not routine process oversight. So the real strategy is not to optimize the process. It is to remove everything that should not be there in the first place. Less process. More value. The question is simple: are we actually engineering the product… or just maintaining a very sophisticated workaround system? #semiconductors #manufacturing #engineering #innovation #yield #processengineering #problemsolving

I didn’t expect an Indian startup to make me look at the lithography, but SemiLit is worth a closer read. It touches the core of chipmaking. The company says it’s building a DUV immersion lithography tool (deep ultraviolet light using liquid between lens and wafer to print tiny circuits) aimed at the 28nm class. Target throughput is ~310 wafers per hour. And it’s priced far below today’s market leaders. Because 28nm is still everywhere in the real world e.g. automotive, industrial systems, analog chips. Not cutting edge, but very important. The chips on which Infineon, Nexperia, and NXP have built their empires. China is moving in the same direction, as I shared in my post earlier. SMIC is testing a domestically built immersion DUV system from Yuliangsheng, also targeting 28nm-class production. Same idea: replace imported lithography tools like ASML’s machines with local alternatives. Beijing’s direction is pretty clear. Reduce dependence, build full-stack control. What’s forming isn’t a simple “ASML vs everyone else” story but multiple regions trying to crack the same middle layer of chip production. Not EUV (extreme ultraviolet for cutting-edge chips), but the "boring" DUV layer that still runs a huge chunk of global manufacturing. India with SemiLit. China with SMEE-linked efforts and partners like Yuliangsheng. Others quietly circling the same problem. Same same, bottleneck but different flags. But here’s the part that actually decides everything. The real test is never throughput or node claims alone. I read that overlay accuracy (how precisely layers align), uptime, serviceability, defect rates, and full fab qualification decide whether a tool survives in production. That’s the nuance in lithography. ASML still sits as the global benchmark for a reason. And that ecosystem is the hard part to replicate. Not just machines but the entire reliability stack. If the economics really work out, it changes who can realistically build chip capacity and where. That becomes a geopolitical lever. Right now, SemiLit and China’s DUV efforts look less like replacements and more like new competitive pressure points. But they are exactly the kind of pressure that reshapes the "good enough" layer of global manufacturing over time. Slowly, then suddenly. Boring chips are strategic. #Semiconductors #Lithography #SupplyChain #ASML #India #China Source: Eveosian on X

The companies that built the semiconductor industry didn't start as giants. ASML started in a shed behind a Philips factory in 1984. KLA was founded by two engineers with a rented office and a borrowed oscilloscope. Lam Research started with one etch tool and a dream. Right now, in 2026, the next generation of semiconductor tool companies is raising money and building the machines that will define the next decade of chip manufacturing. Here's who's making waves — and where they're from: 🇳🇴 NORWAY — Lace Lithography ($40M Series A) Helium atom beam lithography with a claimed 0.1nm beam width. If it works, it could challenge EUV for certain applications. Founded 2023. Target: pilot fab tool by 2029. 🇨🇭 SWITZERLAND — Chiral ($12M Seed, ETH Zurich spin-out) Robotic nanomaterial integration and metrology for carbon nanotube transistors. Wafer-scale fabrication of next-generation transistors. The materials science play nobody is talking about. 🇨🇦 CANADA — Femtum ($11.8M Series A) Mid-infrared fiber laser platform for semiconductor equipment — laser cleaning and trimming at wafer level. The precision laser tool company fabs will need as features shrink below 2nm. 🇯🇵 JAPAN — Gaianixx ($12.7M Series C) Epitaxy technology for growing high-quality single crystals using dynamic lattice matching. University of Tokyo spin-out. Applications in power devices, MEMS, and LEDs. Backed by JX Metals, Toray, and Mitsui. 🇯🇵 JAPAN — Photo electron Soul ($5.6M Venture) Equipment startup. Minimal public disclosure — which in Japan usually means the technology is serious and the IP is protected. 🇺🇸 USA — ThirdAI Automation ($3M Seed) AI-powered root cause analysis for semiconductor equipment failures. Unifies equipment logs, sensor streams, images, and service reports into a causal intelligence layer. The 5 Why's, automated. Founded 2024. 🇧🇪 BELGIUM — Vertical Compute ($42.9M Seed, imec spin-off) 3D memory + compute chiplet architecture for AI hardware. Stores bits in high-aspect-ratio vertical structures with computation units directly below. The memory wall solution. --- The next wave of semiconductor innovation is NOT coming from the US alone. It's coming from Norway, Switzerland, Canada, Japan, Belgium — simultaneously. The CHIPS Act created urgency. That urgency created capital. That capital is now funding tools that didn't exist 3 years ago. The companies that hire the technicians who run these tools will be the ones who win the next decade. Which of these startups are you watching? #CleanroomTimes #Semiconductor #SemiconductorEquipment #StartupFunding #EUV #Lithography #FabTech #Cleanroom #SemiconductorIndustry #Innovation

The chemical that makes chips possible has a new home. And it's being built in Taiwan. Most people in the semiconductor industry know ASML. Fewer know JSR. That's about to change. JSR Corporation is a Japanese chemical company founded in 1957 — originally making synthetic rubber for tires. Today, they're one of three companies on earth that can make the photoresist used in EUV lithography. Without photoresist, there are no chips. Without EUV photoresist, there are no advanced chips. Without JSR, there's a hole in the supply chain nobody can fill overnight. --- Here's what just happened: JSR will build its first semiconductor materials facility in Taiwan — specifically to supply TSMC with advanced EUV photoresists. 📍 Location: Near Hsinchu Science Park 💰 Investment: Tens of millions (initial phase) 🗓️ Target online: 2028 🤝 New JV with local Taiwanese partner, established April 2026 🔬 TSMC engineers involved from day one 🧪 Key product: Metal Oxide Resists (MOR) — next-gen EUV photoresist for 3nm and below JSR CEO Tetsuro Hori said it plainly: "Geopolitical factors and customer requirements are major drivers behind the push for localized production." Translation: you can't run a 24/7 fab when your most critical materials ship from Japan on a 3-week cycle. --- Who is JSR? 19% global photoresist market share — #2 in the world One of only 3 companies making EUV photoresist at scale Taken private by Japan Investment Corporation in 2023 — a national security move Customers: TSMC, Samsung, SK Hynix, Intel Japanese companies control ~80% of global photoresist supply. JSR. Tokyo Ohka Kogyo. Shin-Etsu Chemical. These three are to photoresist what ASML is to lithography. --- The real story — Metal Oxide Resists: Traditional EUV photoresists (CAR) are hitting resolution limits below 3nm. MOR absorbs EUV light more efficiently, achieves better resolution, and generates fewer stochastic defects — the random errors that kill yield at advanced nodes. JSR's MOR tech comes from its acquisition of Inpria Corporation. In 2025, JSR/Inpria and Lam Research announced a cross-licensing deal to accelerate MOR adoption. The stack: - ASML makes the EUV light source - JSR makes the resist that captures it - Lam Research applies it - TSMC runs the process Four companies. One supply chain. Zero margin for disruption. --- What this means for the fab floor: JSR moving to Taiwan means faster sample cycles, tighter co-development with TSMC engineers, and earlier access to next-gen formulations. The resist you'll be running in 2028 is being developed right now in a joint lab in Hsinchu. That's not just a business story. That's a process story. --- What's the most critical material in your process flow that most people outside the fab have never heard of? #CleanroomTimes #JSR #TSMC #Photoresist #EUV #MetalOxideResist #Semiconductor #Lithography #SupplyChain #SemiconductorMaterials #FabTech #Cleanroom

#ASML, a Dutch company, dominates the #semiconductor industry by producing the only machines capable of extreme ultraviolet lithography (#EUV), a crucial technology for manufacturing cutting-edge chips. ASML’s success stemmed from a strategic gamble on EUV, close collaboration with the US government, and a unique approach to outsourcing key components. https://lnkd.in/etSEmkgT #tech #media #news

A great example on developments dominated in the beginning by reactions of “unlikely or impossible” but which in time with innovations and engineering stamina slowly turn into “logical” developments.

🏆 𝑻𝒓𝒂𝒏𝒔𝒇𝒐𝒓𝒎𝒊𝒏𝒈 𝑺𝒆𝒎𝒊𝒄𝒐𝒏𝒅𝒖𝒄𝒕𝒐𝒓𝒔: 𝑨𝒅𝒗𝒂𝒏𝒄𝒆𝒅 𝑺𝒆𝒎𝒊𝒄𝒐𝒏𝒅𝒖𝒄𝒕𝒐𝒓 𝑷𝒉𝒐𝒕𝒐𝒎𝒂𝒔𝒌 𝑴𝒂𝒓𝒌𝒆𝒕 🚀📊 📊 𝑨𝒅𝒗𝒂𝒏𝒄𝒆𝒅 𝑺𝒆𝒎𝒊𝒄𝒐𝒏𝒅𝒖𝒄𝒕𝒐𝒓 𝑷𝒉𝒐𝒕𝒐𝒎𝒂𝒔𝒌 𝑴𝒂𝒓𝒌𝒆𝒕 𝑺𝒊𝒛𝒆 & 𝑭𝒐𝒓𝒆𝒄𝒂𝒔𝒕 The Advanced Semiconductor Photomask Market is projected to grow from USD 5.4 Billion in 2025 to USD 8.7 Billion by 2032, registering a CAGR of 7.0% during the forecast period 📈 ➢ 🔽 𝑨𝒄𝒄𝒆𝒔𝒔 𝒕𝒉𝒆 𝑷𝑫𝑭 𝑺𝒂𝒎𝒑𝒍𝒆 𝑹𝒆𝒑𝒐𝒓𝒕 𝒘𝒊𝒕𝒉 𝑶𝒏𝒆 𝑪𝒍𝒊𝒄𝒌 📊 https://lnkd.in/dY3ta9TE 📊 𝑴𝒂𝒓𝒌𝒆𝒕 𝑰𝒏𝒔𝒊𝒈𝒉𝒕𝒔 & 𝑫𝒓𝒊𝒗𝒆𝒓𝒔 📈 Increasing demand for advanced semiconductor nodes (5nm, 3nm) 🔬 Growth in chip miniaturization & high-performance computing ⚡ Rising adoption of EUV (Extreme Ultraviolet) lithography 📊 Expansion of AI, 5G, and automotive semiconductor applications 🏭 Increasing investments in semiconductor fabs globally 📊 𝑨𝒅𝒗𝒂𝒏𝒄𝒆𝒅 𝑺𝒆𝒎𝒊𝒄𝒐𝒏𝒅𝒖𝒄𝒕𝒐𝒓 𝑷𝒉𝒐𝒕𝒐𝒎𝒂𝒔𝒌 𝑴𝒂𝒓𝒌𝒆𝒕 𝑺𝒆𝒈𝒎𝒆𝒏𝒕𝒂𝒕𝒊𝒐𝒏 𝑰𝒏𝒔𝒊𝒈𝒉𝒕𝒔 🔽 By Type : ☁️ Cloud-Based 🖥️ On-Premise 🔽 By Application : 🏢 SMEs 🏭 Large Enterprises 🏆 𝑲𝒆𝒚 𝑰𝒏𝒅𝒖𝒔𝒕𝒓𝒚 𝑳𝒆𝒂𝒅𝒆𝒓𝒔 ➡️ ➣ Toppan Merrill ➣ DNP Dai Nippon Printing Co., Ltd. ➣ Photronics ➣ Hoya Vision Care ➣ Compugraphics Corporation ➣ SK Electronics ➣ LG Innotek ➣ Taiwan Mask Corp (TMC) ➣ Shenzhen Qingyi Co., Ltd. ➣ Nippon Filcon ➣ Advance Reproductions Corporation ➣ HOYA Electronics ➣ KLA ➣ Applied Materials ➣ ASML ➣ Canonical ➣ Nikon ➣ Lam Research ➣ Tokyo Electron ➣ SCREEN Semiconductor Solutions Co., Ltd. ➣ Intel ➣ Samsung Electronics ➣ TSMC ➣ GlobalFoundries ➣ UMC ➣ SMIC ➣ Micron Technology ➣ SK hynix ➣ Broadcom ➣ Qualcomm ➣ NVIDIA ➣ AMD ➣ Infineon Technologies ➣ STMicroelectronics ➣ NXP Semiconductors ➣ Renesas Electronics ➣ onsemi ➣ Tower Semiconductor ➣ Vanguard International Semiconductor Corporation (VIS) ➣ Powerchip Semiconductor Manufacturing Corp. 📊 𝑻𝒓𝒆𝒏𝒅𝒔 𝑺𝒉𝒂𝒑𝒊𝒏𝒈 𝒕𝒉𝒆 𝑴𝒂𝒓𝒌𝒆𝒕 🚀 Adoption of EUV & nanoimprint lithography (NIL) 📊 Advanced computational lithography (OPC & ILT) 🔍 Focus on defect inspection & yield improvement 🤖 Integration with semiconductor design automation (EDA) 🌐 Expansion of global semiconductor manufacturing ecosystem #️⃣ #Semiconductors #Photomask #ChipManufacturing #EUV #Nanotechnology #AI #5G #Electronics #TechTrends #Innovation #AdvancedManufacturing #DigitalTransformation 🚀📊

Why did TSMC Put Off Buying ASML’s Lithography Machines? At the center of this decision is ASML’s next-generation High-NA EUV system—costing over $400M per unit. And TSMC’s position is clear: they don’t need it right now. Instead, TSMC is choosing a different path: • Extend the life of existing EUV tools • Optimize process technology and yields • Invest heavily in advanced packaging and system-level design This reflects a deeper structural shift in semiconductors: 👉 Scaling is no longer just about smaller nodes 👉 Cost efficiency now competes with raw performance 👉 System architecture (chiplets, packaging) is becoming a primary lever Even TSMC’s roadmap suggests High-NA EUV adoption may be pushed toward the end of the decade, emphasizing timing over technological urgency. The semiconductor race isn’t just about having the most advanced tool— it’s about deploying the right tool at the right moment. In capital-intensive industries like chipmaking, discipline often beats acceleration. #TSMC #ASML #Semiconductors #AI #ChipManufacturing #EUV #DeepTech #Innovation #SupplyChain #TechStrategy #CapitalAllocation #AIInfrastructure #MooresLaw #AdvancedPackaging #Investing #MacroTrends #ChipIndustry #FutureOfTech #Hardware #GlobalMarkets https://lnkd.in/eJFcNW4s

The Silicon Stack (2/?) Not all power is visible. Some of it is printed. Layer by atomic layer. We thought software ate the world. Turns out -- silicon did. No chips > no AI No AI > no edge No edge > no sovereignty Simple. Brutal. Non-negotiable. A $400M machine Printing shadows of light At 13.5 nanometers One company builds it. A handful can use it. Everyone else negotiates. This isn’t supply chain. This is choke chain. Lithography. Logic. Packaging. त्रयम् -- the new trinity of power. And somewhere in this stack India is quietly choosing where to enter the game. Not at the top. Not yet. But exactly where the future bottleneck lives. Because in 2026 -- It’s not the transistor that wins. It’s how you connect them. For the full slide deck see my blog post https://lnkd.in/gWruPFYp #Geopolitics #Semiconductors #AI #India #Yantrajaal #TechPower #PraxisBusinessSchool