Semiconductor Industry News

AI holds great potential for the semiconductor industry and will kick-start the next round of innovation for faster, cheaper and more energy-efficient computation – that was my message today at SPIE Advanced Lithography + Patterning. I discussed the potential and the challenges that AI holds for our industry.   The potential is clearly huge. AI is rapidly integrated into applications, and high-performance compute is expected to underpin growth towards $1 trillion of semiconductor sales by 2030. The challenges are around the computing needs of AI models and related energy consumption. The compute workload of training a leading AI model has increased 16x every 2 years in recent years – much faster than the increase in computing power delivered by Moore’s law, which is about 2x every 2 years. The energy needed to train a leading model has not grown so steeply but still rose 10x every 2 years. This computing need has been met by building supercomputers and massive data centers. If you extrapolate these trends, training a leading AI model would need the entire world-wide electricity supply in about 10 years. That’s clearly not realistic, so the trend has to break, by training algorithms becoming more efficient and by chips becoming more efficient. In other words, the needs of AI will stimulate immense innovation in chip design and manufacturing – and the potential value of AI to our society will put urgency and funding behind that drive. As a consequence, chip makers are pulling all levers to accelerate semiconductor scaling. This includes lithographic “2D” scaling: shrinking the dimensions of transistors to pack more into a square millimeter. It will also include “3D” integration, with innovations like backside power delivery, transistor designs like gate-all-around, as well as stacking chips in the package, where holistic lithography will play a critical role to deliver performance requirements. ASML will support these trends through a comprehensive, holistic lithography portfolio. Our 0.33 NA/0.55 NA EUV lithography systems allow chip makers to shrink dimensions at the lowest possible cost on their critical layers, while tightly matched and highly productive DUV systems will continue to reduce cost. More than ever, metrology and inspections tools – whose data is fed into lithography control solutions that keep the patterning process operating within tight specs to deliver the highest possible production yields – will be essential to deliver 2D scaling and 3D integration processes. 3D integration requires wafer-to-wafer bonding, and we have demonstrated the capability to map the stresses and distortions that bonding creates and to compensate for them, reducing overlay errors for post-bonding patterning by 10x or more.   It was a pleasure catching up with the industry’s lithography and patterning experts in San Jose. I’m excited to see our collective innovation power having a go at these challenges. Together, we will push technology forward.

Rebuilding U.S. manufacturing has quietly begun, and the scale may surprise you. For decades, the U.S. offshored semiconductor and electronics manufacturing to Asia. Over time, China absorbed a large share of that capability. What we face today isn’t theoretical — it’s an economic and national security risk. Reversing that dependency is extraordinarily difficult. We didn’t just move factories overseas. We lost skills, supplier depth, process knowledge, and an entire manufacturing ecosystem. Rebuilding that capability in the U.S. means recreating decades of industrial expertise at speed. This effort began accelerating in 2022 with the CHIPS and Science Act and has compounded rapidly. Based on announced commitments from 2022–2026, semiconductor and electronics investments now total ~$1.7 trillion. ⸻ Who is rebuilding America’s semiconductor & electronics ecosystem Foundry & leading-edge logic (the fabs) 🔹 TSMC: $165B | 2nm–4nm logic, Arizona six-fab cluster 🔹 Intel: $100B+ | U.S. foundry strategy (Ohio + Arizona) 🔹 Samsung Electronics: $45B | Advanced logic & packaging, Texas Memory & AI compute 🔹 Micron Technology: $200B | DRAM & HBM hubs (Idaho, New York) 🔹 SK Hynix: $14B | Advanced AI-memory packaging, Indiana U.S. electronics & silicon anchor customers 🔹 Apple: $600B | U.S. silicon, AI servers, advanced packaging 🔹 Foxconn: $2B+ | AI-server manufacturing for U.S. cloud providers Foundational chips (automotive, industrial, defense) 🔹 Texas Instruments: $60B | Analog & embedded chips 🔹 GlobalFoundries: $12.5B | Secure, automotive, aerospace semiconductors Advanced packaging & integration 🔹 Amkor Technology, Inc.: $2B+ | U.S. back-end packaging, Arizona 🔹 Absolics: $600M+ | Glass substrates for next-gen AI chips Equipment, lithography & process control 🔹 Applied Materials: $4B+ | Process tools & R&D 🔹 ASML: $1B+ | High-NA EUV support (U.S. expansion) 🔹 Lam Research / KLA: $2B+ | Etch, deposition, yield control Materials, wafers & chemicals 🔹 GlobalWafers: $5B | 300mm wafers, Texas 🔹 Fujifilm / Entegris: $1.5B+ | Photoresists & ultra-pure chemicals 🔹 USA Rare Earth: $1.6B | Mine-to-magnet electronics materials Infrastructure that makes fabs possible 🔹 Linde / Air Liquide: $1B+ | Ultra-pure gases piped directly into fabs Geopolitical capital 🔹 Taiwan: $500B total ($250B in direct industrial investment to build fabs, packaging, materials, and suppliers in the U.S. Plus $250B in government-backed incentives to de-risk, accelerate, and anchor those projects long term) ⸻ What we need: 1. Revamp education to produce the ~88,000 engineers and technicians required to staff these future facilities. 2. Continue advancing automation and robotics to reduce labor intensity while increasing reliability and yield. 3. Build strong supply chains with allies for the components we can’t (or shouldn’t) manufacture domestically. #manufacturing #semiconductors #robotics #electronics

Big day for CHIPS investments that provides some insight into what America's semiconductor strategy is going to look like. First, the CHIPS for America office made their first manufacturing incentives announcement today, a $35 million package with BAE Systems. This is notable because this facility in New Hampshire makes legacy chips that go into important defense equipment. Teeing up this announcement underscores national security focus of the program and commitment to legacy production. Second, we also learned today that there will be a $10 billion investment in chips R&D in Albany, New York with a set of corporate partners like IBM, Applied Materials, ASML, and Micron Technology in partnership with New York State. Great example of public-private partnership to accelerate R&D in the United States. Neither of these announcements are about the big megafabs spread out across the country. These manufacturing investments are crucial too. But today's news reminds us that the CHIPS strategy is broad across geographies, sectors and technology. https://lnkd.in/gefUv4UC https://lnkd.in/gx7i5pr7

“In recent decades, only a handful of government interventions have been widely regarded as successes. Operation Warp Speed is one of them. So is the CHIPS Act, the $39 billion program that catalyzed a massive investment boom in manufacturing semiconductors on American soil… …In the years between 2007 and 2020, annual domestic construction spending in computers, electronics, and electrical manufacturing averaged $3.3 billion. After the program was authorized in 2020, and in the nearly five years since, it’s averaged $71.8 billion per year. That’s nearly twenty times higher.” https://lnkd.in/examw8ju

Why Advanced Semiconductor Manufacturing Is No Longer Economically Viable Without Government Support 1. Capital Intensity Has Passed the Point of Commercial Sustainability Historically, semiconductor manufacturing required CapEx at about 20–25% of revenue. Today, for leading-edge nodes (5nm, 3nm, 2nm), capital intensity exceeds 40–45%. That means: ✔️ Nearly half of every dollar in revenue must be reinvested just to stay competitive. 2. Foundries Now Spend $2 in CapEx For Every $1 in Net Profit Integrated device manufacturers (IDMs) and foundries are stuck in an economic paradox: • Profit growth has been linear • CapEx requirements have become exponential The result: ✔️ For every $1 in net profit, a leading-edge manufacturer must spend ~$2 in CapEx. 3. What Is Driving CapEx Explosion A. Tool Costs Have Skyrocketed EUV lithography systems now cost: • $120M a decade ago • $350M+ for the newest High-NA units A cutting-edge fab may require: • 8–18 EUV systems • Hundreds of other tools • 80,000+ m² of cleanroom space A single 2nm-capable fab costs $20–30 billion, sometimes more. B. Process Complexity Is Exponential Each new node demands: • More patterning steps • More layers • New materials • Larger cleanrooms Costs do not scale linearly — they scale exponentially. 4. Up to 25% of Global Semiconductor CapEx is Now Subsidy-Funded Governments are now paying to fill the financing gap. Across major chipmaking regions: United States – CHIPS Act $52B+ in subsidies and tax credits. European Union – EU Chips Act €43B in incentives. Japan Up to 50% cost coverage for fabs (TSMC, Rapidus). South Korea Large tax breaks and direct incentives for Samsung and Hynix. India Government covers 50% of fab CapEx. Combined, these programs cover an estimated 25% of all fab investments globally. 5. Why This Isn’t About Maximizing Profits It is not that foundries are asking for subsidies to make more money. It’s that: ✔️ Without subsidies, they would lose money building and operating leading-edge fabs. Private financial returns alone cannot justify the investment. Governments now see fabs as: • Strategic infrastructure • National security assets • AI and defense enablers • Economic stability drivers Just like power plants, railways, and defense industries, fabs are now a public–private hybrid ecosystem. 6. What Happens If Subsidies Stop If governments stop supporting: 1. Leading-edge fab expansion would slow or stop. 2. TSMC, Samsung, Intel would not build fabs outside of their home countries. 3. Memory manufacturers (DRAM/NAND) would consolidate even further. 4. AI chip prices would surge. 5. The world would become dependent on only a few aging fabs. Older nodes (28nm, 45nm, 90nm) would remain viable, but leading-edge nodes would not. Image credits: YOLE ~~~~~~ If you are looking to invest in semiconductors and need expert insights, drop us a DM.

India is now building the chips it once only dreamed of.   At the heart of this transformation is the India Semiconductor Mission (ISM), a bold $10 billion initiative driving everything from chip fabrication to advanced design and packaging.   In just a few years, India’s chip market has jumped from $38 billion to nearly $50 billion, with projections soaring to over $100 billion by 2030.   This growth is no accident. It’s backed by strategic investments, policy support, and the sheer momentum of sectors like mobile, automotive, AI, and consumer electronics.   What’s even more remarkable is that nearly 1 in 5 semiconductor design engineers globally is Indian.   And with over 22 design-linked projects and 6 fabrication plants already approved including a 3nm chip designed in India the country is proving it has the talent and technology to compete at the highest level.   Major players like Tata Electronics, Micron Technology, and the HCL-Foxconn joint venture are investing billions to set up world-class infrastructure in Gujarat and UP.   These projects don’t just boost production they’re creating tens of thousands of skilled jobs and anchoring India firmly into the global chip supply chain.   As someone who's followed this journey for a while, I can say it finally feels like India’s turning the corner. #india #semiconductor #growing

To kick off the second season of my Industry Forward Podcast, I had the opportunity to sit down with Mike Ellow, CEO of Siemens EDA, and discuss the transformative concept of "shifting left” in developing software defined products. Mike shared invaluable insights into how the comprehensive digital twin is revolutionizing semiconductor development, which in turn is enabling companies to design, test, and produce cutting-edge electronics more efficiently than ever before. This becomes increasingly important as we transition toward software-defined products and systems across all industries. To design, optimize and manufacture software defined products and then update them in the field, OEMs need to have seamless integration across software, electronics, and mechanical. Digitalization is the key to taking this holistic approach and is crucial for managing the complexity of modern systems to stay competitive in a rapidly evolving market. As a Chief Engineer, my teams always selected off the shelf chips that were readily available, and then built our electronics architecture and software around those existing, COTS, processors. This removed risk from the development program, but resulted in limited performance for future upgrades, and accelerated the cycle to replace obsolete parts. In today's fast paced innovation environment, driven by increasing automation and AI solutions, companies need to leverage the latest semiconductors to run the software of today.... and tomorrow! The comprehensive digital twin, in a multi-domain engineering environment, allows companies to co-develop semiconductor hardware and software to optimize their solutions, and set a foundation for future software updates of their products. Tune in to the podcast (link in the comments) to learn more about how Siemens Digital Industries Software is driving innovation and helping organizations digitally transform their processes. 🎧 #EDA #DigitalTwin #Innovation #Semiconductors #IndustryForward

After a decade at Intel, I learned something that will blow your mind about the semiconductor industry. The $600B chip market just changed forever. Here's why: → Generic chips are hitting a wall → AI workloads need custom silicon → One-size-fits-all is dead. But Broadcom + OpenAI just revealed the solution: CUSTOM AI CHIPS. • Tesla's FSD chip: 21x faster than GPUs • Google's TPUs: 80% cost reduction • Apple's M-series: 40% better efficiency • Amazon's Graviton: 20% price improvement Instead of forcing AI into generic hardware... what if we built hardware specifically for AI? The benefits are insane: - 10x performance improvements - 50% power reduction - Custom architectures for specific models - Direct chip-to-algorithm optimization - Massive cost savings at scale This is about RETHINKING THE ENTIRE STACK. From my manufacturing AI work, I've seen how custom silicon transforms production lines. Now we're seeing the same revolution in AI infrastructure. Sometimes the best solutions hide in plain sight 🌟 #AI #Semiconductors #Innovation #Manufacturing #TechTrends #DigiFabAI

India’s semiconductor ambitions are turning into reality - not in headlines, but in labs and startup workspaces. A new generation of chip innovators like #Calligo, #Mindgrove, #Vervesemi, #SaankhyaLabs, and #MorphingMachines is reshaping India’s place in the global value chain by designing advanced chips for AI, telecom, automotive, and mobility applications. Supported by the ₹76,000 crore India #SemiconductorMission, 23 design-linked startups have already secured government incentives. With 20% of the world’s chip design talent based in India, these startups now collaborate with global #foundries such as #TSMC, #UMC, and #DBHi-Tek, linking Indian creativity with global precision. This movement will ripple far beyond electronics - influencing AI-driven transport, EV systems, smart manufacturing, and national infrastructure. The entry of Micron’s $2.75 billion plant in Gujarat and Tata’s planned fabrication unit marks India’s transition from design excellence to manufacturing credibility. 𝐀 𝐆𝐥𝐨𝐛𝐚𝐥 𝐂𝐨𝐥𝐥𝐚𝐛𝐨𝐫𝐚𝐭𝐢𝐨𝐧, 𝐍𝐨𝐭 𝐈𝐬𝐨𝐥𝐚𝐭𝐢𝐨𝐧 The world is entering an era of “tech diplomacy”, where trust and collaboration matter as much as talent and technology. India’s partnerships with the U.S., Japan, Taiwan, and South Korea are not mere trade relationships — they are technology alliances aimed at building resilient global supply chains. India’s balanced position in the Indo-Pacific gives it a rare advantage: it can connect East Asia’s manufacturing capacity with Western innovation ecosystems. The momentum extends beyond funding. Over 20% of the world’s semiconductor design talent sits in India, contributing to R&D for global leaders like Intel, AMD, and Texas Instruments. The return of this talent — through startups and collaborations — is rewriting India’s innovation geography. What #Bengaluru was to software, it could now become to semiconductors. #semiconductor #fablab #innovation #indianeconomy #chipmanufacturing