Design with Calibre

Nos complace invitarte a ASSEMBLY 2025, la 5a edición del foro de transformación digital más grande de México, donde se reunirán líderes clave de la industria, el gobierno y la academia para explorar las últimas tendencias de la industria digital.   El evento será una oportunidad única para sumergirte en un día lleno de masterclasses, sesiones plenarias y actividades de networking, donde podrás conocer de primera mano las últimas innovaciones de la industria digital junto a reconocidos expertos internacinales.   También será el momento ideal para descubrir casos de éxito, dialogar con sus creadores y explorar soluciones que están impulsando la transformación digital a nivel global.   Únase a Juan Andres Torres, Experto Clave en manufactura de Semiconductores, para una presentación sobre La Evolución del Gemelo Digital en el Diseño de Semiconductores y el Papel Central que Juega la IA. Regístrate ahora: https://lnkd.in/ezrZThaV

As semiconductor technology continues to scale, the impact of parasitic effects from metal fill structures has become increasingly critical for maintaining circuit performance, power integrity and reliability. However, accurately modeling these parasitic capacitances while keeping extraction runtimes manageable is a significant challenge facing IC designers... Keep reading in this week's blog https://lnkd.in/ghQASnfv

🎉 Siemens EDA promotes Juan Rey to lead Calibre business! Mike Ellow, CEO at Siemens EDA, has announced that longtime Calibre technologist Juan Carlos Rey has been promoted to the senior vice president and GM of the Calibre business unit within Siemens EDA (Siemens Digital Industries Software). In his new leadership role, Rey will oversee both Calibre Design and Calibre Manufacturing product portfolios extending Calibre’s leadership in advanced IC physical verification and manufacturing to the emerging eras of 3D IC design, silicon photonics and quantum computing. 🗣️ “Calibre has been a stalwart technology that for decades has enabled IC design teams and foundries to deliver state-of-the-art IC innovations to the market,” said Ellow. “With Rey’s leadership, Calibre will continue to enable our customers’ life-changing innovations.”

Design reliability remains a top priority for engineers in the world of semiconductor technology. One critical challenge is identifying and mitigating inter-domain leakage, a phenomenon that threatens both efficiency and performance. In this week's blog, Charlie Olson explores the causes of inter-domain leakage, the limitations of traditional methods, and how modern tools like Insight Analyzer provide innovative solutions to address these challenges https://lnkd.in/g8grfQji

Streamline your IC design process by finding and fixing DRC issues during layout with Calibre precision. John Ferguson explains how Calibre nmDRC Recon can help https://lnkd.in/ggc-zSyi

Were you at SPIE last month? Or not able to make it but wonder what you missed? We've got you covered with our wrap up of the week! https://lnkd.in/gHmGiEP3

Flexible, foundry-independent layout optimization is key for modern IC design. See how Calibre DesignEnhancer integrates seamlessly into existing design environments to boost performance and time-to-market. https://lnkd.in/gGpf5fk2

Chemical stochastic effects impact resist films right after exposure—whether from electrons in e-beam mask writing or EUV photons in EUVL. Azat Latypov was at #spielitho last week explaining how Siemens EDA (Siemens Digital Industries Software) has expanded compact #Calibre stochastic models to account for this variability, e.g. for identification of “hot spots” in e-beam mask writing where stochastic variability spikes, improving precision in advanced lithography. If you weren't at SPIE, or want a reminder of what was there - watch for our wrap up blog coming soon covering our week!

Optimizing OPC models is tough—manual term selection is slow and tedious. Jongyoon Bae was at #spielitho last week to share how Siemens EDA (Siemens Digital Industries Software) is eliminating that challenge with a machine learning (ML)-driven approach using #Calibre SONR. By leveraging high-performance supervised clustering, we systematically reduce dimensionality, removing irrelevant and duplicate terms. Our method selects only the most meaningful kernels from a vast library, improving accuracy while cutting effort. Benchmarking against our best-known manual model shows the power of ML in OPC modeling. If you weren't able to attend SPIE don't worry! Watch for our wrap up blog coming soon covering our week there!

Skeleton extraction is crucial in semiconductor manufacturing, especially for Optical Proximity Correction (OPC) and mask correction. Traditional algorithms struggle with accuracy and connectivity, often leading to distorted results. Loay Anwar is at #spielitho discussing how our enhanced algorithm, designed for #EDA improves precision by reducing noise and ensuring continuous skeletons. This advancement boosts pattern fidelity, efficiency, and overall yield in photomask optimization. A step forward in refining semiconductor design! Watch for our wrap up blog coming soon highlighting our week at SPIE.