Piyush Devikar

🔍 Why Is VLSI Recruitment So Challenging? 🤔 If you've ever tried hiring in the VLSI domain, you know it’s no walk in the park. From sourcing to onboarding, it’s a tough game—and here’s why: 💡 1. Niche Skill Set: VLSI isn't just another tech buzzword—it’s a highly specialized field requiring deep knowledge in areas like digital design, verification, physical design, and semiconductor fundamentals. Not every engineer can make the cut. 📉 2. Limited Talent Pool: The number of engineers trained in VLSI (especially hands-on experience) is much smaller compared to general software roles. Even fewer have experience with industry tools like Synopsys, Cadence, or Mentor. 🏫 3. Gap Between Academia & Industry: Universities often focus on theoretical aspects, while the industry demands practical expertise. This disconnect makes it harder for fresh grads to be job-ready, slowing down the hiring funnel. ⚙️ 4. Long Training Time: Even if you find good candidates, ramping them up takes months. Companies are cautious because hiring the wrong candidate in a chip design role is costly—literally. 📍 5. High Competition: Big players, startups, and fabs alike are all fishing from the same pond. Good candidates are often snapped up before you even get through the interview process. 🎯 What's the way forward? Partner closely with academic institutions for curriculum alignment Offer internships & co-op programs to create a future talent pipeline Invest in upskilling passionate engineers from adjacent domains Streamline and speed up your hiring process Let’s talk about how we can make VLSI hiring more sustainable and scalable. Are you facing the same challenges? Drop your thoughts below! 👇 #VLSI #Semiconductors #HiringChallenges #TalentAcquisition #ChipDesign #EDA #VLSIHiring #Recruitment

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Is VLSI Talent Acquisition still seen as a cost center in 2025? Let’s change that. Every chip company wants the best ASIC, SoC, and Firmware talent. But not every company treats hiring as a strategic function. Too often, I see: 🔸 Hiring plans driven by urgency—not roadmap alignment 🔸 Recruiters chasing unrealistic timelines without clear JD-to-skill mapping 🔸 Interviewers chosen by availability, not capability 🔸 Offers made before stakeholder calibration is complete But when hiring works—it changes everything: ���� Execution speed 💥 Team morale 💥 Retention 💥 Tapeout timelines So why are TA leaders still fighting for a seat at the table? If 2025 is the year of GenAI and semiconductor resurgence— It must also be the year TA becomes a business partner, not a backend service. What I believe: ✅ Every headcount should tie back to silicon delivery KPIs ✅ TA should sit with engineering leadership—not behind them ✅ Interviews should be structured like design reviews: consistent, data-backed, and outcome-driven Talent drives silicon. TA should drive strategy. If you're in TA, HR, or leadership in the VLSI space—what’s still holding us back from making this shift? Let’s start the conversation. 💬 #VLSI #Semiconductor #TalentAcquisition #HiringStrategy #Leadership #GenAI #TapeoutSuccess #RecruitingReimagined

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Hiring patterns changed. RAM prices explained. Hiring strategy across semiconductor companies has quietly shifted. 1. Less generic VLSI hiring 2. More demand for HBM & memory architecture experts 3. High-speed interfaces & advanced packaging 4. Bandwidth, power, and performance specialists That was the first signal. Then came my deductions AI doesn’t just need compute — it needs memory bandwidth. So memory companies shifted capacity from commercial DRAM to HBM for data centers and AI accelerators. What followed was inevitable: Less commercial RAM supply Same demand Higher prices everywhere This isn’t inflation. This is AI-driven prioritization. Your laptop RAM is now competing with AI data centers. And AI always wins. Strategic shift by memory vendors Slowing consumer & commercial DRAM Aggressively pushing HBM for AI & data centers Fewer wafers for PCs, phones, laptops More capacity reserved for high-margin HBM stacks Result? Even regular RAM feels expensive. Hiring patterns tell the future before prices do. Watching how the HBM ecosystem evolves across memory, foundry, and AI platforms. SK hynix / Samsung Electronics / Micron Technology / NVIDIA / AMD / Intel Corporation / TSMC / Amkor Technology, Inc. / ASE Global 💬 Curious to hear from memory, SoC, and system architects — Is HBM the biggest silent disruptor of this decade?

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Exploring a career shift into VLSI? Here's a quick-start guide. VLSI is a core field that requires both strong fundamentals and smart preparation. But the biggest challenge? Knowing where (and how) to begin. This 6-slide carousel breaks it down: 🔍 What companies actually look for in freshers 🧭 How to choose between frontend vs backend roles 🛠️ Essential skills and tools to get started 🏢 Entry-level roles and companies hiring now 📄 Resume tips for better visibility in applicant tracking systems (ATS) 🎥 Also, check out this useful VLSI interview prep video: 👉 https://lnkd.in/gHNW8zrH For anyone transitioning from electronics or embedded systems, this post offers clarity and direction to confidently take the next step. — #vlsi #chipdesign #frontendvlsi #backendvlsi #verilog #systemverilog #fpga #rtl #timinganalysis #edatools #hardwaredesign #vlsijobs #careertransition #engineeringjobs #atsresume #interviewprep #digitaldesign #vlsistudent #learnvlsi #jobsearchtips #freshersupport

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Breaking into VLSI Industry: A major chunk of my linkedIn messages are from bright, ambitious freshers who all ask the same thing: "How do I actually get into the VLSI Industry?" It's an awesome field, full of innovation, but getting your first foot in the door can feel pretty tough, especially right out of college. Let's be real, most of the top VLSI product companies tend to hire freshers directly from campus placements. If you're not coming from that pipeline, landing a role can be super difficult because of all the competition and their established campus relationships. But here's the good news: this isn't a dead end! There's definitely a smart, strategic way in, and I've seen many people successfully navigate it. Your VLSI Plan: 1. Build an Killer Portfolio: If direct campus access is tricky, your portfolio becomes your secret weapon. Don't just learn the theory, truly master Digital Electronics, SystemVerilog, and CMOS. Then, get your hands dirty! Build real projects – think of a simple RISC processor, a UART, anything you can design and implement. Use open-source tools, and make sure to show off your work on GitHub with clear explanations. Oh, and definitely pick up Python/TCL/Perl for scripting, it's a huge plus in VLSI. 2. Start Smart with Service Companies : This is often the easiest first step for freshers outside campus. VLSI service companies are more open to hiring new talent. Now, the pay might not be as high as a product company right away, but honestly, don't let that stop you! See this as an intensive learning boot camp. You'll get invaluable hands-on time with industry tools, various design flows, and real projects. 3. Let Experience Open Product Company Doors Once you've got about 1.5 to 3 years of solid, relevant experience under your belt from a service company, things change dramatically. You're no longer just a "fresher." Product companies actively seek experienced pros from the open market. Your proven skills and practical knowledge become super valuable, opening up a whole new world of roles you might not have been able to access initially. It's a journey that takes persistence and a smart approach, but trust me, a career in VLSI is absolutely within your reach! What are your thoughts on this strategy, or what's your biggest hurdle right now? Let's chat in the comments! Explore open-source EDA tools like: Icarus Verilog (for simulation): https://lnkd.in/grcdTvjQ Yosys (for synthesis): https://yosyshq.net/yosys/ Magic VLSI (for layout): https://lnkd.in/gd8VxkK7 Check out online platforms like EDA Playground for browser-based HDL simulation: https://lnkd.in/gJjzvAVj Look for project ideas and existing repositories on GitHub's VLSI topics : https://lnkd.in/gxf43z88 #VLSI #Semiconductor #CareerAdvice #Freshers #Engineering #DigitalDesign #Hardware #TechJobs #CareerPath #ExperienceMatters #OpenMarketHiring #India #Bengaluru

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How to start learning Verilog Coding with minimum effort, and more efficiently with less mistakes (Useful for people wanted to start Verilog from scratch): There are few simple and basic strategies present which if being employed can help someone to learn Verilog coding with ease and less effort. [1] The first one is Coding guidelines: ✓ Use only Blocking assignment for the Combinational Ckt implementation. ✓ Use Non-Blocking assignment for Sequential ckt coding. ✓ Do not assign the same variable from multiple always block within a single process to avoid race condition. ✓ Do not mix blocking and Non-Blocking assignment within the same code logic. ✓ Avoid using #0 delay assignment while implementing logic. ✓ Put all the signals in the sensitivity list while implementing Combinational logic or use always @(*) ✓ Complete the if..else condition and verilog case condition while coding, otherwise a latch will infer. ✓ Use enum instead of param while coding FSM logic for ease of implementation and better debugging. ✓ Use Non-Blocking assignment while implementing Latches (if at all needed) ✓ Use of always_comb, always_ff and always_latch to simplify the coding logic. ✓ Use of wire in input and assign continuous assignment statements. For outputs reg can be used. To remove all these confusion and simplify the code, logic keyword needs to be used. ✓ Use Non-Blocking assignments while using both Combinational and Sequential logic. [2] The second part is to keep the above points in mind while learning verilog. ✓ Start with the digital logic fundamentals and to focus on how each block operates like Adder, Subtractor, LAC, Mux / DeMux, Encoder, FSM, Counter, Gates, FF and Shift register because ultimately RTL logic can be decomposed into mixed combination of these blocks and fine grained into gates, FF and wires. ✓ Start with Verilog code of Combinational and Sequential circuit (by applying the logic . One can use edaplayground to implement the logic and check for syntax and logical errors. ✓ Then start to implement FSM logic using both Mealy and Moore State Machine. ✓ The next step is to build a simple testbench or a self checking mechanism in Verilog to check whether the written code is meeting the expectation. ✓ After that one can move on to implement complex logic. Some sources to learn: ✓ Verilog book by Samir Palnitkar and J bhasker ✓ SV for HDL by Stuart Sutherland ✓ Papers on Verilog and SV on Internet (Many good papers are there) #vlsi #asic #electricalengineering

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To all early-in-career #VLSI enthusiasts in #India — this post is for you! Most folks I’ve spoken with are actively seeking “some kind of guidance” in these three key areas: 1)Gaining industry exposure 2)Getting hands-on experience in VLSI / building relevant experience for a Master’s 3)Finding opportunities despite having a low CGPA Prof. Rajesh Kedia (whose work I deeply admire) is teaming up with Department of CSE, IIT Hyderabad and Intel Corporation to conduct a Computer Architecture workshop. I strongly recommend this — even if it means spending some bucks and traveling to Hyderabad for a few key reasons: - You’ll get a firsthand look at one of India’s top IITs - You'll meet and interact with real-world engineers — a rare and valuable opportunity - You’ll be surrounded by like-minded VLSI enthusiasts, and if you network smartly, the learning can be tremendous Keep your eyes open for opportunities like these. They might just be the stepping stone you need. #VLSI #Semiconductors #ChipDesign #EarlyCareer #IITHyderabad #Intel #ComputerArchitecture #ECE #HardwareEngineering #VLSICareers #EngineeringOpportunities #Networking #TechWorkshops #CareerGrowth #LearningByDoing #GraduateStudies #MSPrep

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Here’s a good LinkedIn post format you can use to present this as an interview question. It’s clear, engaging, and encourages others to attempt it: --- 🚀 Verilog Interview Question🚀 I came across an interesting Verilog snippet that tests your understanding of fork-join, delays, and scheduling** in simulation. 💡 Question: 👉 Can you predict the value of a, b, c ? 👉 Explain step by step what happens during the `fork-join` block execution. This type of problem helps check: ✅ Knowledge of Verilog simulation time control (# delays) ✅ Behavior of fork-join parallelism ✅ Event scheduling inside `initial` blocks #VLSI #verilog #interview #RTL #mavensilicon #interviewpreparation

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Life of an RTL Designer: More Than Just Writing Code: Who understands? In the semiconductor world, RTL design often looks simple from the outside: write Verilog/VHDL, run simulation, and hand it off. But anyone who has lived this role knows it is far more multidimensional. RTL development is a cycle of deep technical work, constant refinement, and continuous alignment with system requirements. Every project brings a different flavor of challenges: 1. Multiple Modes of RTL Coding From architectural definition to micro-architecture development, RTL coding spans: • Clean, synthesizable Verilog/VHDL for production • Test and debug-oriented RTL to isolate specific corner cases • Timing-aware, constraint-driven RTL to close paths cleanly • Low-power RTL applying clock-gating and power-gating strategies • Parameterized, reusable RTL for scalable designs 2. Verification: The Unseen Half of the Work RTL is only the beginning. The bulk of the engineering effort is ensuring the design behaves exactly as intended: • Simulation-based verification • Assertions, formal checks, linting, CDC/RDC analysis • Functional coverage analysis and coverage closure 3. Board-Level Bring-Up and Testing Even after simulation, the real world has its own constraints: • FPGA bring-up • Debugging signals with logic analyzers and ILA • Timing anomalies that never showed up in simulation • Hardware interactions that demand practical fixes 4. Quality and Compliance Requirements Meeting quality standards is not optional. • Coding guidelines and design reviews • Static analysis and timing sign-off, Power, area, performance trade-offs • AXI/ISO/DO-254/ASIL/Telecom/Avionics compliance 5. Deadlines, Requirements, and Constant Coordination The role requires tight collaboration with architects, verification teams, physical design, and firmware. Requirements evolve, timelines shift, and priorities get redefined. 6. The Reward 😎 When that block passes verification, closes timing, meets power budgets, and integrates smoothly into a larger SoC or FPGA system that is the pride of an RTL designer. You know your logic will run in millions of devices, silently and reliably. This is the life of an RTL designer: A balance of precision, creativity, discipline, and continuous problem solving. Not glamorous from the outside, but deeply fulfilling for those who build the digital logic behind tomorrow’s products. Agreed ? Cheers!  Happy Weekend ! #RTL #FPGA #Silicon #Project #Verilog #VHDL #AMD #Xilinx #Life #Engineer #Design #Standard #Quality #CDC #Challenge #platform #Vivado #simulation #Verification #Timing #Closure #Algorithm #AXI #ISO #ASIL #Telecom #Avionics #Aerospace #Defense #Medical #HLS #versal #Kria #Artix #UltraScale #Creativity #Discipline #Glamorous #Architect #Physical #firmware #problem #Solution #logic #ILA #hardware #software #Behavioral #Functional #Test #Debug #Power #budget #Area #Performance

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How I’d Ask for a Referral If I Were in College Again 🎯 As a VLSI Engineer at Google, I often get cold messages like: “Hi, can you refer me?” Referrals aren’t about luck. They’re a skill. And when done right, they can open doors that cold messages rarely do. ❌ What doesn’t work: “Hi, can you refer me?” No resume. No job link. No context. And worst of all, no effort to check the careers page. 👉 Don’t expect someone else to find the right role for you. ✅ What actually works: 1. Find the Role Yourself Go to the careers page of the company. Look for roles that match your interest — RTL, STA, DFT, PD, etc. Attach the job link when you ask. 2. Fix Your LinkedIn Profile Show you’re serious about VLSI. Highlight your tools (Verilog, Synthesis), projects, internships, or coursework. 3. Send a Clear, Polite Message Here’s what I would send today if I were in college: “Hi [Name], I’m a final year student passionate about [Domain]. I recently worked on [Brief Project]. I found this opening: [Job Link] and I believe it’s a good fit. I’ve attached my resume — would you be open to referring me?” 4. Follow Up (Respectfully) Wait 5–7 days before sending a gentle reminder. Don’t spam. One follow-up is enough. 5. Stay Connected Even if someone doesn’t refer you, thank them. Comment on their posts. Build real connections. Make it easy for others to help you by doing the homework first. Referrals aren’t shortcuts — they’re multipliers. If you’re someone genuinely trying to break into the VLSI industry, feel free to connect or reach out. Happy to help when I can. 💬 #VLSI #SemiconductorCareers #ReferralTips #HardwareJobs #LinkedInAdvice #DFT #STA #RTL #CollegeToCareer #Internships #PlacementSeason

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Thousands Are Studying VLSI. Only a Few Are Getting Hired. 👇 👇 Lots of students are spending large amounts of money on VLSI and chip design courses, hoping for great job prospects. But here’s what’s really happening: - Most of these students are still looking for jobs and not getting hired. - Companies are pulling back on fresh graduate hiring. - Only those who have strong, hands-on industry skills are landing offers. - India’s semiconductor industry is definitely growing, but that growth isn’t translating into jobs for everyone. For example, VLSI job openings dropped from 3,760 in May 2024 to just 3,181 in March 2025—a 15% year-on-year decline even in top tech hubs. The market is fierce, and just having a certificate isn’t enough...!! The big question: Are we training people for #jobs that don’t exist, or are most candidates simply not prepared for the jobs that are available??? If you’re a student who invested in a #VLSI course, an engineer struggling to find a good role, a founder in semiconductors, or someone hiring in this space—let’s start a conversation. Drop a “VLSI” in the comments if you’re working or looking for opportunities in VLSI/semiconductors... DM me if you’re hiring or interested in collaborating, and share this post if you think others should see it, too.... Follow Prashant Pammar for latest updates...

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Back to the Basics During my personal interaction with a few of my juniors in the VLSI field, I have found that many of them are excellent engineers doing a lot of wonderful things in their respective domains be it place and route, timing closure or reliability. But one thing I have unfortunately found lacking is many of them are not very clear on the basics from how things work like it does to how something is done the way it’s there. As engineering is a scientific field and to question is the very foundation of science, it’s very important to have some good ideas about the physics and the foundational rules that govern VLSI. Though I don’t claim to be a professor or even someone close to that, based on my years of experience, I will try to shed some lights on few basics which are truly important in this field. I may not be able to share as frequently as I would like to so please bear with me in case you see infrequent postings. And remember learning never stops. #basics #vlsi #learning

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Why do you keep posting VLSI job openings even when you get nothing in return? This is a question many people asked me. The answer is simple... because I know how hard the job struggle is in VLSI hardware. I know how it feels to: * Search for jobs daily... * Refresh LinkedIn again and again... * Apply to 100+ roles and hear nothing back... * Feel confused, tired, and invisible... VLSI is not an easy field to enter. Freshers don’t always have: Proper guidance... Right connections or even clarity on where to apply... So whenever I see a VLSI opening related to freshers, I try to post it immediately. Not because I gain something from it. Not because I get paid for it. I only get a few messages from unknown people saying: Thank you, this helped me. And honestly, that is more than enough for me. If even one person gets an interview, a chance, or hope because of a post I shared that’s worth it. We rise better when we lift each other in this difficult industry. #vlsi #jobsearch #freshers #semiconductor #engineeringcommunity #physicaldesign #dft #sta #careerjourney #helpingothers #freshersjobs #engineeringjobs #techcareers #careergrowth #jobsearchindia #physicaldesign #sta #dft #verification #rtl #verilog #systemverilog #learningjourney #fresherlife #jobhunt #helpingothers #communitysupport #indiavlsi #semiconductors #electronicsengineering #careerguide #linkedinindia

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It's a common mistake M.Tech freshers make on their resumes: listing basic circuits like adders, flip-flops, and gates and similar smaller circuits as their projects. While these are foundational, they aren't considered full projects in the professional world. A real project should demonstrate how you apply these concepts to create a more complex system. Recruiters want to see that you can move beyond theory and build something tangible. A strong project shows your ability to integrate multiple components into a cohesive design, not just your knowledge of a single building block. For instance, instead of listing a "4-bit adder," showcase a "data path for a simple CPU," which uses adders along with other components in a functional system. Verilog Projects for a Single Person Here are five projects you can tackle alone to make your resume stand out: 1. Simple CPU/Processor: Design a basic 8-bit or 16-bit CPU. This shows a deep understanding of computer architecture and control logic. For curious people use this github link for exploring one sample project: https://lnkd.in/gwQjDkpN 2. VGA Controller: Create a module to interface with a monitor. This project proves your skills in handling timing, synchronization, and memory. 3. Digital Clock with Alarm: Go beyond a simple counter and design a complex Finite State Machine (FSM) to manage different modes and user inputs. 4. Data Encryption/Decryption System: Implement a simplified cryptographic algorithm to demonstrate your ability to handle complex, bit-level data manipulation. 5. Audio Processing Unit: Build a simple digital filter or equalizer. This project introduces you to digital signal processing (DSP) and real-time data handling. By choosing a project like one of these, you'll be able to demonstrate a well-rounded skill set that goes far beyond a basic theoretical understanding of digital circuits. Good luck! #Verilog #DigitalDesign #VLSI #MTech #Freshers #CareerAdvice

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