Chris Cook

🚨 Copper isn't dead. It’s moving closer to the chip. As AI data centers push toward 200G, 224G and eventually 448G electrical lanes, traditional PCB routing becomes a major bottleneck. Enter CPC — Co-Packaged Copper. 🔌 What is CPC? Traditional architecture: ASIC → BGA → PCB → connector → cable CPC changes the path: ASIC → package substrate → high-speed copper cable Instead of forcing high-speed signals through long PCB traces, CPC uses compact twinax / flyover copper assemblies connected directly to the package substrate. That dramatically reduces the electrical channel between the silicon and the cable. ⚡ Why does this matter? At 224G PAM4, every millimeter matters. Longer PCB traces mean: ❌ More insertion loss ❌ More reflections ❌ More crosstalk ❌ More equalization ❌ More power ❌ More signal-integrity challenges CPC attacks the problem at the physical layer: Shorter electrical path → lower loss → better signal integrity → lower power. And unlike optics, copper doesn't require optical engines, lasers or photodetectors. 🏗️ How is CPC manufactured? The interesting part is that this is not simply “a cable attached to a chip.” The process involves: 1️⃣ High-density package substrate design 2️⃣ High-speed I/O escape directly from the substrate 3️⃣ Precision connector / contact attachment 4️⃣ Twinax or flyover copper assembly 5️⃣ Controlled impedance routing 6️⃣ Mechanical retention and thermal integration 7️⃣ High-speed electrical characterization 8️⃣ BER / eye-diagram / SI validation Samtec, for example, has demonstrated 224G PAM4 CPC integrated on substrates as small as 95 × 95 mm. 🧠 Who is using / developing it? Some of the key players include: 🔹 Marvell Technology — 224G SerDes + CPC architectures 🔹 Broadcom — high-speed SerDes demonstrations 🔹 Samtec Inc — Si-Fly HD CPC 🔹 Molex — Impress co-packaged copper 🔹 Luxshare-Tech — CPC and long-reach copper solutions 🔹 BizLink Group — high-speed copper interconnects 🤖 Where does CPC fit? Think of the data center interconnect stack: Short reach → Copper CPC / DAC / AEC / ACC ⬇️ Longer reach → Optical Optical modules / CPO / Silicon Photonics CPC is particularly attractive for scale-up and intra-rack connectivity, where copper can still provide major advantages in cost, power and latency. 📦 And here's the semiconductor packaging implication: CPC makes the package substrate part of the networking architecture. The substrate now has to handle: → Extremely high I/O density → 200G/224G+ SerDes → Controlled impedance → Signal integrity → Mechanical interfaces → Thermal constraints So the boundary between: Chip design ↔ Packaging ↔ Networking is disappearing. ATPION

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Why Advanced Semiconductor Manufacturing Is No Longer Economically Viable Without Government Support 1. Capital Intensity Has Passed the Point of Commercial Sustainability Historically, semiconductor manufacturing required CapEx at about 20–25% of revenue. Today, for leading-edge nodes (5nm, 3nm, 2nm), capital intensity exceeds 40–45%. That means: ✔️ Nearly half of every dollar in revenue must be reinvested just to stay competitive. 2. Foundries Now Spend $2 in CapEx For Every $1 in Net Profit Integrated device manufacturers (IDMs) and foundries are stuck in an economic paradox: • Profit growth has been linear • CapEx requirements have become exponential The result: ✔️ For every $1 in net profit, a leading-edge manufacturer must spend ~$2 in CapEx. 3. What Is Driving CapEx Explosion A. Tool Costs Have Skyrocketed EUV lithography systems now cost: • $120M a decade ago • $350M+ for the newest High-NA units A cutting-edge fab may require: • 8–18 EUV systems • Hundreds of other tools • 80,000+ m² of cleanroom space A single 2nm-capable fab costs $20–30 billion, sometimes more. B. Process Complexity Is Exponential Each new node demands: • More patterning steps • More layers • New materials • Larger cleanrooms Costs do not scale linearly — they scale exponentially. 4. Up to 25% of Global Semiconductor CapEx is Now Subsidy-Funded Governments are now paying to fill the financing gap. Across major chipmaking regions: United States – CHIPS Act $52B+ in subsidies and tax credits. European Union – EU Chips Act €43B in incentives. Japan Up to 50% cost coverage for fabs (TSMC, Rapidus). South Korea Large tax breaks and direct incentives for Samsung and Hynix. India Government covers 50% of fab CapEx. Combined, these programs cover an estimated 25% of all fab investments globally. 5. Why This Isn’t About Maximizing Profits It is not that foundries are asking for subsidies to make more money. It’s that: ✔️ Without subsidies, they would lose money building and operating leading-edge fabs. Private financial returns alone cannot justify the investment. Governments now see fabs as: • Strategic infrastructure • National security assets • AI and defense enablers • Economic stability drivers Just like power plants, railways, and defense industries, fabs are now a public–private hybrid ecosystem. 6. What Happens If Subsidies Stop If governments stop supporting: 1. Leading-edge fab expansion would slow or stop. 2. TSMC, Samsung, Intel would not build fabs outside of their home countries. 3. Memory manufacturers (DRAM/NAND) would consolidate even further. 4. AI chip prices would surge. 5. The world would become dependent on only a few aging fabs. Older nodes (28nm, 45nm, 90nm) would remain viable, but leading-edge nodes would not. Image credits: YOLE ~~~~~~ If you are looking to invest in semiconductors and need expert insights, drop us a DM.

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A timely post from Jordan Mitchell, MILLIBEAM’s Head of RF PA development on our #GaN #RF #PA innovation. At MILLIBEAM, we are bringing high-performance and unparalleled reliability to mission-critical markets that have been relegated to an afterthought. #radars #defence #satcom

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Happy new year! I am back and lets start with news. MLC #NAND Flash Shifts to a Niche Market as Major Suppliers Exit, Reshaping the Supply Chain TrendForce Corp.'s recent research indicates that as major international NAND Flash producers reduce or halt MLC NAND Flash output and redirect their capital and R&D investments toward advanced process tech, the worldwide MLC NAND Flash capacity is expected to decrease by 41.7% YOY in 2026, leading to increased supply-demand discrepancies. The significant decline in MLC NAND Flash supply is mainly due to Samsung Electronics — formerly the largest supplier—announcing in March 2025 that its MLC NAND products would reach end of life, with final shipments in June 2026. Additionally, KIOXIA Group, SK hynix, and Micron Technology have limited their MLC production primarily to meet existing customer demand, with little motivation to increase capacity. As supply rapidly contracted and no large, quickly ramping replacement capacity appeared, the MLC NAND Flash market experienced strong pull-in demand and early volume commitments from late 1Q25, causing prices to rise sharply and maintain this upward trend. TrendForce observes that demand for MLC NAND Flash in end markets remains fairly stable, primarily driven by industrial control, #automotive #electronics, medical devices, and networking equipment. These sectors have strict demands for reliability, write endurance, and long-term supply commitments. However, the long-term growth outlook for these applications remains limited. Furthermore, if certain use cases drive adoption of improved TLC solutions, or if the overall NAND Flash market enters a clear cyclical downturn, the price of MLC NAND could still face indirect downward pressure. https://lnkd.in/d5yUFiUH Personal addition 🤓: It seems that the market will be prepared for the EOL of MLC. After Samsung's EOL Kioxia is the only big one left to produce MLC. Anyhow, Kioxia is not interested to further increase production volumes, as MLC's technology is easily replacable by 3D TLC, nowadays. The prices have been skyrocketing so that they are very close to entry level 3D TLC (before allocation). The difference...MLC will probably not get lower anymore as there is no competition left and once 3D TLC allocation is done, the price will be quite equal. So, the idea is to move the MLC customers to 3D TLC sooner or later. What's happening in the market, especially MLC, is crazy. Contracts are broken more than once. Prices are dellivery based and leadtime is going up to 6 months... #embedded #embeddedsystems #IIOT #industry40 #SSD #storage #memory #NAND #DRAM #automation #automotive #electronics #semiconductor #technology altec ComputerSysteme GmbH

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Real systems rarely operate under ideal conditions. Chip companies lead with peak numbers. Peak TOPS, bandwidth, throughput. But in practice, systems are waiting for data, limited by memory, or under-utilized by software. The gap between the data sheet and the real world is where most of the interesting problems live. Peak performance is what a chip could do. Real performance is what it actually does. What number do you trust more than the headline metric?

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The hard part of scaling a semiconductor equipment manufacturer isn't the strategy. It's the week a customer pulls a ramp in by two quarters, a key supplier misses a delivery date, and a few hundred people are waiting to hear what happens next. I've been in that seat more than once. As CEO of a semiconductor infrastructure supplier, I acquired a second-generation family business and, alongside a team I'm proud of, grew revenue roughly 7x and headcount from a few dozen people to several hundred in under five years. I then led its sale to a publicly traded strategic acquirer. Earlier, as CFO of a semiconductor component distributor, I helped grow semiconductor revenue more than 5x, expanded operations from three U.S. states to 20+ states and two international markets, led two acquisitions, and negotiated the company's sale to private equity. Across my career: → Two exits, one to private equity and one to a publicly traded strategic → 10+ M&A transactions led from the operator's seat, buy-side and sell-side → A turnaround of a mid-sized manufacturer from annual losses to profitability in two years → Teams built from a few dozen people to several hundred without losing the culture that made them work The lesson that runs through all of it: deals and growth plans rarely fail on the spreadsheet. They fail on execution, on integration, and on whether the leadership team can hold together when the plan meets reality. Today I lead Semicon Ventures and I'm taking on a select number of advisory and board roles with companies in semiconductor equipment, component supply chain, sub-fab systems, and AI infrastructure. I'm especially interested in helping founders and management teams working through one of these: → Scaling production and capacity faster than the organization can keep up → Preparing for, negotiating, or integrating an acquisition → Building the leadership team for the next stage of growth → A situation that has gotten complicated and needs a new perspective If that describes your company, or you know a founder, CEO, or board who could use that perspective, I'd welcome a conversation. #Semiconductors #AIInfrastructure #SemiconductorEquipment #Manufacturing #MergersAndAcquisitions #BoardAdvisor #Leadership

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