"however, that node isn’t coming until late next year – a solid 1.5 years behind." You're comparing Intel product launch to TSMC manufacturing start, so 1.0 years seems more accurate.
TSMC details its 5-nanometer node for mobile and HPC applications. The process features the industry’s highest density transistors with a high-mobility channel and highest-density SRAM cells. #5nm #TSMC #HPChttps://fuse.wikichip.org/news/3398/tsmc-details-5-nm/ …
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It's way past manufacturing start buddy...
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“Faster than Moore‘s Law pace” - bless TSMC’s eyeroll lies. Has anyone heard anything about thermal density?
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It doesn't say faster than Moore's Law pace. It says faster than the historical trend line (which historically has been way less than 2x/2yrs). That's a fact based on actual data - my data, not TSMCs FWIW. Thermal density is a separate issue to device compaction.
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