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tomehabb/README.md

👋 Hi, I’m Thomas Ehab, a Master’s student in Embedded Systems Security at Grenoble INP – Esisar, France, specializing in secure hardware/software co-design and real-time systems.

👨‍💻 I’m passionate about embedded systems, cybersecurity, and digital twin technologies, with hands-on experience in C/C++, Python, and VHDL for microcontroller and FPGA development. My current focus is on building robust, efficient systems for connected mobility and critical applications.

👩‍🎓 My academic journey includes advanced coursework in cryptography, secure embedded architecture, RTOS, and hardware-in-the-loop simulation. I’m currently working on A-FPGA, an antenna signal processing project, and Side-Channel Attack Labs, analyzing hardware vulnerabilities and countermeasures.

👥 I’m a proactive problem-solver with penetration testing experience, skilled in Linux, Git, Docker, and network protocols. I thrive in multidisciplinary R&D environments and enjoy translating complex technical challenges into validated solutions.

🔎 I’m seeking a 5–6 month internship starting February 2026 in cybersecurity, embedded systems, or simulation R&D to apply my skills in an industrial innovation context and contribute to cutting-edge projects.

📩 Feel free to reach out at tomehab@outlook.com or connect on LinkedIn. I’d love to discuss opportunities!

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  1. Deepfake-Generation-and-Detection Deepfake-Generation-and-Detection Public

    This project creates and detects deepfakes. We use InsightFace for face analysis and imswaper_128.onnx for face-swapping. For detection, CNN and Meso4 models identify deepfakes, supporting secure a…

    CSS

  2. Embedded-Systems-Security-Labs Embedded-Systems-Security-Labs Public

    Documentation and implementations of labs from the Embedded Systems Security course — exploring hardware, firmware, and IoT security concepts

    Python

  3. Hardware-Implementation-of-Modular-Arithmetic-for-RSA-FPGA- Hardware-Implementation-of-Modular-Arithmetic-for-RSA-FPGA- Public

    VHDL-based RSA modular arithmetic and 16-bit RSA core on Basys3 FPGA.

    VHDL