APB Interfacing logic for Lattice Propel Peripheral Axi-APB interface usable for Soft RiscV processor
Build with Lattice IP Packager and Propel

• APB to LocalMemory (example code for 7 memory mapped locations)
  
• APB to PWM (quad PWM, 16bits, 4 registers memory mapped)
  
• APB to SPI ( 4 wire SPI with DC interface for OLED drive, incl drivers SSD1351)
  
• APB to ADC (Dual ADC, continous conversion, 1.2V Vref, 4 Memory mapped locations)
  
  Tested with MAS Educational Board -> link[https://maselettronica.com/product/mas-educational-board-certus-pro-nx/?lang=en]