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1. STS_project STS_project Public

   STS

2. RISCV_Lab RISCV_Lab Public

   Design some components in a RISCV Processor in verilog, simulate using Verilator and GTKWave

   Verilog

3. Computer-Architecture-Lab Computer-Architecture-Lab Public

   Forked from dotienmanh/Computer-Architecture-Lab

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4. gemmini gemmini Public

   Forked from ucb-bar/gemmini

   Berkeley's Spatial Array Generator

   Scala

5. gemmini-rocc-tests gemmini-rocc-tests Public

   Forked from ucb-bar/gemmini-rocc-tests

   Fork of seldridge/rocket-rocc-examples with tests for a systolic array based matmul accelerator

   C