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  1. first-project-code first-project-code Public

  2. DATA-SCIENCE-TASK-1 DATA-SCIENCE-TASK-1 Public

    Jupyter Notebook

  3. DATA-SCIENCE-TASK-2 DATA-SCIENCE-TASK-2 Public

    Jupyter Notebook

  4. Single_Cycle_RISC-V Single_Cycle_RISC-V Public

    Forked from ArjunPShetty/Single_Cycle_RISC-V

    This project implements a RISC-V Single-Cycle processor in Verilog, integrating PC, ALU, register file, control, and memory into a simple reference CPU design.

    Verilog

  5. RISC-V_CPU RISC-V_CPU Public

    Forked from ArjunPShetty/RISC-V_CPU

    A custom 32-bit RISC processor implemented in Verilog, demonstrating datapath, control logic, and instruction execution.

    Verilog