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Experimental, performance focused grassroots implementation of Python 3.
Zig
A compiler for a small systems programming language, backed by LLVM.
Zig 2
My take on a hardware description language that transpiles to verilog.
Dual issue, in-order RV64GCB + supervisor core in Verilog 2005.
Verilog
Experimental control stack for AVBotz Nemo.
C 2
[WIP] A fast SystemVerilog simulator
C++
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