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1. core_ftdi_bridge core_ftdi_bridge Public

   Forked from ultraembedded/core_ftdi_bridge

   FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge

   Verilog

2. style-guides style-guides Public

   Forked from lowRISC/style-guides

   lowRISC Style Guides

3. common_cells common_cells Public

   Forked from pulp-platform/common_cells

   Common SystemVerilog components

   SystemVerilog

4. tech_cells_generic tech_cells_generic Public

   Forked from pulp-platform/tech_cells_generic

   Technology dependent cells instantiated in the design for generic process (simulation, FPGA)

   SystemVerilog

5. common_verification common_verification Public

   Forked from pulp-platform/common_verification

   SystemVerilog modules and classes commonly used for verification

   SystemVerilog

6. DDR4_controller DDR4_controller Public

   Forked from oprecomp/DDR4_controller

   SystemVerilog