Pinned Loading

1. or1200 or1200 Public

   Forked from openrisc/or1200

   OpenRISC 1200 implementation

   Verilog

2. ibex ibex Public

   Forked from lowRISC/ibex

   Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

   SystemVerilog

3. mor1kx mor1kx Public

   Forked from openrisc/mor1kx

   mor1kx - an OpenRISC 1000 processor IP core

   Verilog

4. picorv32 picorv32 Public

   Forked from YosysHQ/picorv32

   PicoRV32 - A Size-Optimized RISC-V CPU

   Verilog