Skip to content
View Abdul99Aleem's full-sized avatar
🎯
Focusing
🎯
Focusing

Highlights

  • Pro

Block or report Abdul99Aleem

Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
abdul99aleem/README.md

Abdul Aleem

Embedded Systems • VLSI • Real-Time AI Systems

Building low-latency systems from silicon to cloud.


Focus

  • Real-Time AI Voice Infrastructure
  • AXI-based DMA Architectures (Zynq / FPGA)
  • Embedded Linux (Buildroot)
  • WebRTC + Edge Deployments

Currently

  • Designing AXI DMA modules on Zynq
  • Scaling realtime OpenAI voice pipelines
  • Optimizing WebSocket + media systems

Open to Collaborate On

  • FPGA / RTL projects
  • Edge AI deployments
  • Low-latency distributed systems
  • Embedded + Cloud integration

Stack

Languages
C • C++ • Python • Go • TypeScript

Systems
Linux • Docker • GCP • MongoDB • Redis

Hardware / FPGA
STM32 • Zynq • AXI4 / AXI-Lite • Vivado • Buildroot


Contact

📫 abdul99aleem@gmail.com
🔗 https://github.com/Abdul99Aleem


Contribution Graph

pacman contribution graph

Popular repositories Loading

  1. Schedulix Schedulix Public

    QNX E-HACK Hackathon

    C 2 1

  2. streaming-attention-accelerator streaming-attention-accelerator Public

    FPGA

    Verilog 1

  3. Network_Telemetry_SoC Network_Telemetry_SoC Public

    RISC-V Network Telemetry & Secure Packet Monitoring SoC-RTL design, AXI/AHB-Lite interconnects, hardware AES-128, packet telemetry, and verification using Synopsys VCS/Verdi.

    SystemVerilog 1

  4. First-demo First-demo Public

    This is my first Git Repository.

    HTML

  5. localrepo localrepo Public

    WorkFlow Basic

    HTML

  6. C C Public

    C programming

    C