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1. Crossbar Crossbar Public

   SystemVerilog 2

2. riscv-isa-manual riscv-isa-manual Public

   Forked from riscv/riscv-isa-manual

   RISC-V Instruction Set Manual

   TeX

3. ara ara Public

   Forked from pulp-platform/ara

   The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core

   C

4. tiny-gpu tiny-gpu Public

   Forked from adam-maj/tiny-gpu

   A minimal GPU design in Verilog to learn how GPUs work from the ground up

   SystemVerilog

5. verilator verilator Public

   Forked from verilator/verilator

   Verilator open-source SystemVerilog simulator and lint system

   C++

6. cva6 cva6 Public

   Forked from openhwgroup/cva6

   The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

   Assembly