Why Circuit Design Choices Cause EMI Failures

⚡ Why EMI/EMC Matters in DC-DC Converters DC-DC converters step down or step up voltages (e.g., from HV battery to 12V system). They switch at high frequencies (50kHz – 500kHz+), which generates significant EMI. Poor EMC design can affect nearby systems (like infotainment, ADAS, BMS) or violate regulatory limits. 🔍 Key EMI/EMC Challenges SourceEMI RiskNotesHigh dV/dt and dI/dt SwitchingRadiated & Conducted EmissionsEspecially from MOSFET/IGBT switchingLayout ParasiticsEmissions/Noise SusceptibilityLoop area, trace impedancePower CablesRadiated EmissionAct as antennas, especially long HV cablesControl SignalsSusceptibilityCAN, PWM signals may be corruptedCommon Mode NoiseEmissions through chassis or groundOften overlooked ✨ EMI/EMC Design Strategies for DC-DC Converters 1. PCB Design Use short, wide traces. Minimize high-current loop areas. Keep power and control grounds isolated with a single-point connection. 2. Filtering Input/output LC filters to suppress conducted noise. Common Mode Chokes (CMC) on power lines. Snubber circuits across switching devices. 3. Shielding Shield the entire converter enclosure (Faraday cage). Shielded cables (especially HV lines). 4. Grounding Use star grounding to avoid ground loops. Isolate noisy and quiet grounds. 5. Component Choices Use soft-switching topologies (ZVS/ZCS) when possible. Use EMI-rated capacitors (X/Y class). 📏 Test Standards Test TypeStandardDescriptionConducted EmissionCISPR 25 / CISPR 32Emission through DC linesRadiated EmissionCISPR 25 / ISO 11452-2Emission from enclosure & cablesConducted ImmunityISO 7637-2Load dump, cranking, burst pulsesRadiated ImmunityISO 11452-4/2External RF susceptibilityESDISO 10605Static discharge events. #EMI #EMC #DC-DC Converters #DC-DC #shielding #filter #AC-DC #RF #RE #RI #HV #LV

800 V Systems Fail Differently Than 400 V — Here’s Why Moving from 400 V to 800 V is often presented as a simple trade: lower current, higher efficiency, faster charging. In practice, it’s a change in failure physics. At 800 V, especially with #SiC switching speeds, many problems that were tolerated at 400 V stop being benign and start becoming destructive. Here’s what actually changes: 1. Voltage margin collapses Yes, current drops, but the absolute distance to device limits shrinks. A few nanohenries of stray inductance that caused “noise” at 400 V can push an 800 V system straight into overvoltage at turn-off. Overshoot becomes a reliability issue, not just a waveform artifact. 2. dv/dt becomes the dominant stress Fast SiC edges expose every parasitic path: Gate–power loop coupling increases False turn-on becomes easier Common-mode noise rises sharply What used to be a tuning problem becomes a #layout problem. 3. Insulation is no longer forgiving At 800 V, partial discharge, creepage, and clearance stop being checklist items. Small geometry mistakes, voids, or sharp copper edges can age insulation rapidly — even when average voltage looks safe. 4. EMI scales non-linearly Higher voltage swing plus faster edges means common-mode energy explodes. Filters get larger, grounding becomes critical, and “acceptable” layouts from 400 V platforms suddenly fail EMC. 5. Layout becomes the system limiter At 400 V, poor layout often reduced performance. At 800 V, the same layout causes failures. That’s the key shift: 800 V doesn’t just reduce current — it removes margin. Design priorities must change: Power-loop inductance first Symmetry before tuning Insulation and #EMI treated as primary constraints 800 V SiC systems don’t fail because the silicon is weak. They fail because the platform exposes every weakness that slower, lower-voltage systems used to hide. Image source: ChinaCarHub (800 V #EV platform shown for reference). #PowerElectronics #Inverters #800V #InverterDesign #ReliabilityEngineering #HighPowerDensity

In IIT hostels, the worst insult was calling someone a 'maggu' - a studious plodder. Similarly, in power electronics, transformers are often the unglamorous workhorses that get minimal design attention. But what if transformers hold the key to both efficiency and EMI performance? I've been studying some fascinating work on flyback transformer design. When engineers tested several different transformer configurations - changing nothing else in the circuit - the results were eye-opening. Simply by optimizing the wire diameter and winding structure, efficiency jumped from 86.9% to 89.0%. This 2.1% improvement means 12% lower total system losses. And all from just one component. The secret? It's not about adding more copper. In fact, adding more copper (larger wire sizes or extra winding layers) can actually be counterproductive. The laws of physics are tricky here. At high frequencies, current doesn't flow uniformly through conductors. It concentrates near the surface - the famous "skin effect." When you place multiple wires near each other, things get even worse with "proximity effect." This creates a challenging balance: - Too-small wire diameter = high DC resistance and losses - Too-large wire diameter = high AC resistance and even greater losses The optimal solution isn't intuitive. For a 60 kHz flyback transformer, the sweet spot for primary windings was four strands of 0.25mm wire rather than a single thicker wire. Equally important was how the windings were arranged. Interleaving the primary and secondary windings reduced leakage inductance by 30%. This cuts energy losses in the snubber circuit considerably. For EMI, the engineers showed how built-in common-mode balancing reduced conducted emissions by up to 26 dB. That's enough to potentially shrink your EMI filter components or eliminate debugging nightmares later. I'm struck by how much performance was left on the table by conventional designs. The magnetizing energy lost through poorly designed transformers isn't just about efficiency - it directly impacts thermal management, reliability, and cost. Engineers often spend countless hours optimizing semiconductor components while neglecting transformer design. But without a well-designed transformer, the rest of the circuit can't reach its potential. What's the practical takeaway? Pay attention to: - Wire diameter relative to skin depth at your switching frequency - Interleaving techniques to reduce leakage inductance - Common-mode balancing for EMI reduction The transformer isn't just a component - it's the heart of your flyback power supply. Texas Instruments demonstrated this beautifully in their paper on flyback transformers, showing how seemingly small design choices can significantly impact overall performance. What component in your designs has delivered surprisingly significant improvements when you paid more attention to its design?

I Measured 50 Reference Designs. 47 Will Fail In Your Product. 📊 That's not a typo. 94% of the reference designs we tested in our lab have fundamental flaws that will cause field failures. Here's what we discovered: • 82% had PDN impedance peaks above 100 mΩ • 71% showed control loop instability under transient loads • 65% failed EMC pre-compliance testing • 43% exhibited excessive jitter on high-speed signals The most mind-blowing part? These aren't cheap, no-name designs. We're talking about reference boards from major semiconductor vendors that engineers copy-paste into their products every day. Take real examples from our lab: We measured Wurth Elektronik's 178013801 EVM - instability at 20kHz with only 7.957° stability margin. TI's TPSM8D6C24 VRM? 18.7° out of the box. That's a ticking time bomb in your design. In one case, adding a single 1.5mF capacitor: • Improved stability margin from 8° to 32° • Reduced voltage ripple by 41% • Cut transient response swings nearly in half Another VRM required 5.4mF of additional capacitance just to reach basic stability. That's not mentioned in the datasheet. That footprint expansion could kill your space-constrained design. The problem? Vendors optimize their reference designs for simplicity and BOM cost, not real-world performance. They assume ideal conditions that don't exist in your product. We measured everything - PDN impedance with our Bode 100/500, transient response on the MXO5, EMI with proper near-field probes. The data tells a sobering story. But here's the good news: every single failure mode is fixable. Proper impedance measurements, strategic component changes, and actually tuning control loops can turn these reference designs into rock-solid implementations. Want to see the actual measurements and learn how to fix these issues? We've documented everything in our measurement blog: https://lnkd.in/ePhvhxMi Because copying a reference design shouldn't mean copying its failures. Measure first, or pay later. 💪 #signalintegrity #powerintegrity #EMC #hardwareengineers #electricalengineers #pdndesign #measurementsolutions #signaledgesolutions #testandmeasurement #designvalidation

⚡Understanding Return Current Paths: Why Frequency Matters ⚡ All circuits obey Kirchhoff’s current law: any current that flows out must return to its source. In practice, return currents will always find a path back. If you do not deliberately route the return path, the currents may wander through unintended routes and create interference. Electric current paths have impedance Z=R+jωL. At low frequencies R dominates; at high frequencies jωL dominates. In other words, at low frequency the return current follows the path of least resistance, whereas at high frequency it follows the path of least inductance. In PCB design, reference planes must be carefully managed. A continuous ground plane directly under high-speed traces provides the lowest-inductance return path. At high frequencies, most of the return current will flow in the plane immediately beneath each trace; this keeps loop area and impedance minimal. Be Careful: Any discontinuity (slot, split or void) in that plane forces the return current to detour, greatly enlarging the loop area and radiated EMI. Return Paths in Common Cable Configurations: 1️⃣ Single conductor above metal plane → Only one return path: the metal plane. Both low and high-frequency currents return this way. 2️⃣ Coaxial cable grounded at both ends → High-frequency currents (MHz+) return via the shield. → Low-frequency currents share return paths based on resistance. 3️⃣ Twisted-wire pair between two devices → HF current flows neatly in the pair (out one wire, back on the other). → LF current leaks through the chassis grounds — often causing EMC headaches. Return current paths shift with frequency. If you're not accounting for that in your layout, cabling, or grounding strategy, you're likely setting yourself up for EMI issues, crosstalk, or performance degradation. #EMC #SignalIntegrity #PCBDesign

Unexpected Resonances – EMI Filters vs. Converter Control Loops: Sometimes the hardest problems in power electronics aren’t inside the converter itself, but in how it interacts with its environment. A classic example: resonances between EMI filters and converter control loops. The issue: *EMI filters add extra poles and zeros into the system. If the converter’s control loop isn’t designed with this in mind, their interaction can create unexpected resonances. *The result? Oscillations, instability, failed compliance tests, or strange field failures that are hard to reproduce. How to predict and damp: *Model the input impedance of the converter and the output impedance of the EMI filter – instability often arises when the two are comparable. *Use Middlebrook’s criterion as a design guideline. *Add damping networks (RC snubbers, resistive damping in filter capacitors, or active damping). *Validate with frequency response analysis (FRA), not just time-domain testing. Lesson learned: An EMI filter is not just an add-on for compliance – it becomes part of the control system. Treating it as such early in design saves painful debugging later.

High Speed Digital: Topic 2: Unmasking Mode Conversion: The Silent Threat to High-Speed Differential Signals High-speed differential signals are the backbone of modern electronics, but a hidden phenomenon called Mode Conversion can quietly degrade performance and wreak havoc with EMI. Let's break down what it is, why it's a problem, and how we can fight it. Definition: Mode Conversion At its core, mode conversion is the unwanted transformation of useful differential signal energy into common-mode noise. Ideally, differential pairs are perfectly balanced, with equal and opposite currents. When this balance is disturbed, some of the differential energy "leaks" into a common-mode current. Why Does It Happen? The Root Cause is Asymmetry! Our image illustrates this perfectly: a pure differential signal encounters asymmetry, which splits its energy into a degraded differential signal and newly generated common-mode noise. Geometric Asymmetry: 1. Trace Length Mismatch (Skew): The most commonly understood cause. If one trace is longer, signals arrive at different times. Unequal Coupling: Varying distances to ground planes or adjacent traces for each leg of the pair. 2. Via Structures: Uneven antipad sizes, different via stub lengths, or variations in drill locations for the P and N vias. 3. Material Asymmetry (Fiber Weave Effect): In high-frequency designs, the varying dielectric constant (Dk) between resin-rich and glass-fiber-rich areas of a PCB laminate can cause impedance differences between the P and N traces, even if they look geometrically identical. How to Mitigate Mode Conversion: 1. Exact Trace Matching: Not just length, but ensure identical bends, widths, and proximity to obstacles. 2. Consistent Return Path: Ensure both P and N traces always have a solid, uninterrupted reference plane directly beneath them. Avoid crossing plane splits! 3. Balanced Vias: Use identical via structures (same pad sizes, antipads, back-drilling if needed) for both legs. Differential Routing Rules: Maintain tight intra-pair spacing to maximize coupling and minimize external interference. 4. Material Selection: For extremely high frequencies (>10-20 Gbps), consider laminates with very uniform Dk or spread-glass weaves to minimize fiber weave effects. By understanding and actively managing asymmetry, we can ensure our high-speed differential signals deliver their full performance potential and keep our designs quiet! #SignalIntegrity #HighSpeedDesign #PCBDesign #EMC #HardwareEngineering #ElectronicsDesign

𝐅𝐥𝐨𝐚𝐭𝐢𝐧𝐠 𝐂𝐨𝐩𝐩𝐞𝐫 𝐂𝐚𝐧 𝐑𝐮𝐢𝐧 𝐒𝐢𝐠𝐧𝐚𝐥 𝐈𝐧𝐭𝐞𝐠𝐫𝐢𝐭𝐲 Why Via Stitching Isn’t Optional In this post I want to show how 𝐮𝐧𝐜𝐨𝐧𝐧𝐞𝐜𝐭𝐞𝐝 𝐜𝐨𝐩𝐩𝐞𝐫 𝐩𝐥𝐚𝐧𝐞𝐬 can wreck signal integrity and create an 𝐄𝐌𝐈 𝐩𝐫𝐨𝐛𝐥𝐞𝐦. What I'm showing here is a microstrip transmission line with copper planes next to it. The copper planes 𝐚𝐫𝐞 𝐧𝐨𝐭 𝐜𝐨𝐧𝐧𝐞𝐜𝐭𝐞𝐝 𝐭𝐨 𝐠𝐫𝐨𝐮𝐧𝐝. The signal in the transmission line capacitively couples with the planes which causes standing waves on those planes. These interact with the transmission line again, causing 𝐬𝐢𝐠𝐧𝐚𝐥 𝐥𝐨𝐬𝐬. It also causes unwanted transmissions (𝐢𝐧𝐭𝐞𝐫𝐟𝐞𝐫𝐞𝐧𝐜𝐞). I want to show you how to prevent this problem by using 𝐯𝐢𝐚 𝐬𝐭𝐢𝐭𝐜𝐡𝐢𝐧𝐠. The question is: What is the maximum distance between them? 𝐓𝐡𝐞 𝐦𝐞𝐚𝐬𝐮𝐫𝐞𝐦𝐞𝐧𝐭 𝐫𝐞𝐬𝐮𝐥𝐭𝐬 𝐬𝐡𝐨𝐰 𝐭𝐡𝐚𝐭: 87mm via distance ~ 700MHz, 43mm via distance ~ 1400MHz 22mm via distance ~ 2900MHz. So a safe value is: Dmax = 0.25 * 1.5e8 / Fmax (Fmax in Hz, Dmax in m). Just place grounding vias at that maximum distance and you won't have problems. For digital signals, use 9 * Fmax to take harmonics into account. 🎓 Check out my free one-hour course module on Electromagnetic PCB Design. You’ll also get the Electronics Product Development Checklist based on 31 years of professional experience. 👉 https://lnkd.in/e4kVVwA3 Best regards and Happy Designing, Hans Rosenberg #SignalIntegrity #EMI #PCBDesign #HighSpeedDesign #ElectromagneticCompatibility #HardwareEngineering #ElectronicsDesign

You 𝐟𝐨𝐥𝐥𝐨𝐰𝐞𝐝 𝐭𝐡𝐞 𝐫𝐞𝐟𝐞𝐫𝐞𝐧𝐜𝐞 𝐝𝐞𝐬𝐢𝐠𝐧. The board worked. Then 𝐢𝐭 𝐟𝐚𝐢𝐥𝐞𝐝 𝐄𝐌𝐂. Here’s why: Reference designs usually focus on functional circuits. But they rarely account for the fact that your PCB is also a collection of small antennas. The schematic works. The layout is functional. Then the board radiates. Because current paths and return conductors were never treated as part of the RF structure. That’s why designs that “match the reference” still fail EMC. The circuit is fine. The physics was ignored. Go Bust EMI. -Joost 𝐏.𝐒. EMI problems rarely come from “bad designs.” They come from antenna effects no one flags early. If you want clarity before EMC testing, send me your PCB design. Within 3 days, you’ll know: - where it will radiate - why - and what to fix to pass EMC with confidence So EMI isn’t something you have to worry about later. #electricalengineering #pcbdesign #electricalengineer

When I first started with PCB design, I thought a PCB designer’s job was simply to take electrical schematics and replicate them exactly as such into physical circuits. Boy, was I wrong! Over time, and after tons of facepalm mistakes, I finally understood that this is not really what our job is. The job of a PCB designer is actually to channel electromagnetic energy and redirect it in the most efficient way possible, following the connections as required by the electrical schematic to ensure the circuit functions properly. The goal is to keep the energy contained within the PCB and redirect it to the components or systems that need it, with as little energy as possible being converted into electromagnetic emissions. The difference between my initial understanding and this realization is that EMI, or Electromagnetic Interference, has a huge impact on how PCBs are designed. Unfortunately, when we first enter this field, we’re often taught that EMI is like "black magic" and totally unpredictable. Many people start to believe that the best way to deal with EMI is to rely on last-minute filtering and shielding techniques as much as possible—using ferrite beads, capacitors, and chokes here and there—and only worry about it when we encounter issues. This turns into a situation where it's a matter of when the problem arises, not if. The reality is, if the circuit isn’t designed with EMI in mind from the concept phase, we’re left with costly and limited options later on, once the circuit has already been developed. This often leads to a redesign of the circuit, as the right filters and shields may simply not be enough to compensate for a poor PCB layout in the first place. Designing a PCB for low EMI requires you to consider the source, the path, and the victim of EMI. This means that as PCB designers, our primary responsibility is to control the source of emissions. We need to think about how the circuit we design is either going to channel energy where it’s needed or convert it into unwanted emissions. The key lies in the PCB layout itself. Unlock that, and you can free your electronic product from EMI. I hope this helps, Dario fresuelectronics.com #pcbdesign #electronics #hardware #EMC #EMI #fresuelectronics --------------------------------------- PS: If you need 1:1 support for fixing EMI issue, DM me " SUPPORT " and I'll personally get back to you.