Siemens Electronic Systems Design & Manufacturing

Beyond technology, one of the most valuable aspects of #DesignCon continues to be the collaboration between industry experts, customers, and partners working together to solve next-gen design challenges. Throughout the conference, one consistent theme emerged from customer conversations: SI and PI challenges are no longer isolated problems. They are tightly connected across chip, package, board, and system levels. We're leveraging AI within HyperLynx to simplify complex SI/PI analysis, uncovering critical design insights, and automating verification tasks, helping engineers move from setup to actionable insights faster than ever. Here are some highlights from a great week — thanks for joining us!

"Why is this PCIe Gen5 link failing?" "What capacitor values do I need for optimal PDN performance?" This week at #DesignCon, ask these questions out loud at our booth and watch what happens. We're demonstrating: 💡 How our Fuse EDA AI System helps turn raw simulation data into insights, instantly ⚡Multi-domain PDN analysis on a cutting-edge AMD Versal™ SoC platform design

If it’s words of signal integrity wisdom you seek, look no further than our #DesignCon booth. 😌 We’ve partnered with Eric Bogatin and Judy Warner to bring you one of Eric’s iconic sayings in a sticker format. Put it on your water bottle. Put it on your monitor. Stick it to your forehead so you see it in the mirror – whatever you need to do to remember that “Hope cannot be part of your design strategy.” #PCBDesign #SignalIntegrity

Flex circuits look simple. Until you try to build them.    Behind every sleek wearable, foldable device, or compact form factor is a manufacturing reality that’s far more complex than rigid PCB design. In our latest article, we break down six common flex circuit challenges that can quietly impact reliability and yield:    • NSMD vs. SMD pad definitions in bend areas   • Coverlay transitioning into LPI solder mask   • Stiffener placement and mechanical support   • Copper width changes near bends   • Copper direction changes approaching flex regions   • Silkscreen placed too close to bend zones    The common thread?    If your digital twin doesn’t fully understand the relationship between coverlay, copper, LPI, stiffeners, and bend areas — your DFM process is flying blind.    Flex and rigid-flex designs demand manufacturing-driven design. And that means verification that reflects real materials, real processes, and real-world constraints.    Because in flex design, reliability isn’t just electrical.    It’s mechanical.    Read more here: https://lnkd.in/g2GVY-Pz      #PCBdesign #FlexCircuits #DFM #RigidFlex

Want to know why a channel failed, what's collapsing the eye, or how to fix margin issues? 🤔 Next week at #DesignCon, we'll be demonstrating how our Fuse EDA AI System helps turn raw simulation data into insights, instantly! If you’re working on verification, compliance, or system-level analysis, this is a demo you don’t want to miss. Ask ➡️ Plot ➡️ Understand ➡️ Fix!   Come see the Fuse EDA AI System in action and discover how we're reshaping the industry once again with our innovative, simulation-driven design approach! #AI #PCBDesign

DesignCon 2026 begins next week! Be sure to stop by the Siemens EDA (Siemens Digital Industries Software) booth next week to pick up this limited edition die-cut sticker that is part of The Engineering EEcosystem's Eric Bogatin's Wisdom Quest! This includes one of Eric's iconic quotes. Can you guess which one it is? 👉 Learn how to participate here: https://lnkd.in/gdWJXae8 #DesignCon #TheEEcosystem #hardwaredesign #electricalengineering #PCBDesign

A design review is only as strong as the system behind it. In enterprise PCB development, “we reviewed it” isn’t enough. What matters is whether the review process is structured, repeatable, and connected to the design data itself. A robust managed design review workflow includes: ✅ A dedicated platform with ECAD integration  Review tools must connect directly to the design environment. Collaborative annotation, version control, automated notifications, and reporting should live alongside the schematic and layout, not in disconnected emails or static PDFs. ✅ Work-in-progress data management  Schematics, layouts, libraries, and documentation need lifecycle tracking. A single source of truth prevents version confusion and protects data integrity across teams. ✅ Automated verification engines  DRC, ERC, SI, PI, and DFM checks should run before human review begins. Automated engines surface issues early, standardize evaluation, and reduce the burden on specialists. ✅ Defined ownership  Signal integrity, PDN analysis, mechanical fit, manufacturability. Each domain needs a clear owner. Accountability prevents critical issues from slipping through. ✅ Standardized review stages  Schematic review. Preliminary layout review. Final layout review. Gerber review. Clear entry and exit criteria keep programs aligned and predictable. ✅ Structured feedback and escalation paths  Visual markup tied directly to design data. Categorized issues. Clear conflict resolution. Reviews move forward instead of stalling in ambiguity. ✅ Performance metrics that matter  Cycle time per board. Re-spin count. First-pass yield. Feedback resolution rate. What gets measured improves. When these elements work together, reviews stop being reactive checkpoints and become part of building boards that are correct by construction. Read more here: https://lnkd.in/gX5Jq34b #PCBDesign #DesignVerification #EngineeringWorkflow #DFM #SignalIntegrity 

The promise of AI in PCB design is huge, but what about the reality? A recent article by Dave Wiens published in February's edition of I-Connect007 magazine, 'Is AI in PCB Design the Magic Tonic of All That Ails Us?' lays out the crucial challenges we face...from IP security concerns to ensuring verifiable, production-grade results. Engineers rightly ask: 'Will it take longer to set up than doing it manually? Will it replace me?' Although I don't believe AI will take your job, I do strongly believe it will be the the engineer who learns and utilizes AI to his/her advantage that will! The article emphasizes that AI's transition, like any automation, requires extensive validation and seamless integration. It's inspiring to see how Siemens, with over 1000 AI developers, is tackling these head-on. We're leveraging AI to: * Optimize designs for performance * Assist new engineers with natural language documentation * Predict supply chain issues * And much more, all while ensuring data management and verification. This approach underscores AI as an enhancer of human expertise. What's the biggest hurdle you've encountered in adopting AI for design? #PCBDeisgn #IA #ElectronicSystemsDesign #Siemens https://lnkd.in/gsBAhmn3?

Attending #DesignCon? Stop by our booth to see how you can do multi-domain PDN analysis and optimization better.   We’ll demonstrate a complete PDN analysis workflow on a cutting-edge AMD Versal™ SoC platform design. The workflow begins with thermal-electrical co-simulation where HyperLynx DC Drop validates voltage drop and current density requirements, then exports detailed power distribution data to Simcenter Flotherm for junction temperature calculations based on actual power dissipation.    The analysis then progresses to AC decoupling verification and PDN Decoupling Optimization which intelligently calculates optimal capacitor selection and placement and converges on the best solution automatically. This integrated approach ensures robust, optimized power delivery for today's most demanding adaptive SoC platforms. #ElectricalEngineering #PCBDesign

High-speed digital signals don’t look anything like the square waves in timing diagrams. In reality, they slosh, reflect, ring, and couple into neighboring traces. And the moment your driver edge rate is fast enough relative to the electrical length of the net, placement and routing decisions start to matter. That’s when you’ve crossed into signal integrity. The challenge today isn’t whether SI analysis is important. It’s that there are far more “high-speed” nets than there are SI specialists. Many teams rely on vendor guidelines up front and visual inspection at the end. Post-layout simulation, if it happens at all, is limited to a few representative nets. The result is predictable: issues slip through, prototypes go to the lab, and boards get respun. A better approach is pragmatic and progressive. Start simple. Build the analysis in stages. Understand which physical effects are actually eating into your margin. As Eric Bogatin says, the accuracy you need goes up as your margin goes down. Not every problem requires a Lamborghini-level simulator. What matters is applying the right level of analysis at the right time. That’s the idea behind Progressive Verification: • Design Rule Checking to automatically catch common electrical issues before they become lab discoveries • Standards-based analysis to validate the interconnect against protocol requirements • Vendor-based simulation when detailed device models are available and accuracy truly matters Signal integrity tools are powerful, but they are not magic. They amplify engineering judgment, they don’t replace it. When simulation is embedded early and applied intelligently, signal integrity stops being a last-minute firefight and becomes part of building boards that work the first time. Read more here ➡️ https://sie.ag/388Fvb #SignalIntegrity #PCBdesign #DesignVerification #Engineering