Anyone who has tried to program or debug multiple FPGA or embedded boards over JTAG knows that the problem is rarely JTAG itself it’s everything built around it. Proprietary multi-drop setups, expensive debug probes, and poor scalability quickly become bottlenecks as soon as a project moves beyond a single board. Toolchains don’t always cooperate, and scaling up often leads to a frustrating question: “Do I really need to buy more hardware just to debug more targets?” That frustration is exactly what led us to build Periplex JTAG. Periplex JTAG is a software solution, designed to let engineers program and debug multiple embedded systems using a single Vaaman board. It uses the Periplex expansion architecture to manage multiple JTAG targets, while integrating directly with OpenOCD, so engineers can stay within familiar, scriptable workflows. By moving the complexity into software, Periplex JTAG reduces the need for multiple physical probes, lowers cost, and makes JTAG scale naturally in lab, startup, and research environments. This approach has already been tested with STM32, ESP32, and Trion & Titanium FPGAs, and continues to evolve based on real-world engineering feedback. The goal is not to replace existing tools, but to make them scale better without adding more hardware to the bench.
Innovative Solutions
With the kind of work you folks seem to be doing and the relative traction you get, I must say, many embedded engineers wont even know 10% of what this post is about. Not even the ones in big tech (they just are busy writing superficial C codes on an already built, tried and tested HW-SW integrated system. This is some good scratch level work which we need more folks in our country to do. This is what actual embedded systens is ! Really appreciate it. I myself have been working on the VEGA ARIES (the CDAC board) and seems JTAG is an issue if we move across boards.