From the course: Learning FPGA Development

Inside an FPGA: Logic blocks - FPGA Tutorial

From the course: Learning FPGA Development

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Inside an FPGA: Logic blocks

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- [Presenter] There are many basic elements inside FPGAs that make it possible to provide the arbitrary functionality we want. Here are the most basic of these elements. First we have logic blocks, which contain the logic elements that finally implement your design. These include digital devices like lookup tables, flip-flops and multiplexers. Next we have the inter-connect block, which is an enormous network of switches that route the logic elements to connect them as your design requires. I/O blocks contain the circuitry for input and output things in the integrated circuit. Most FPGAs contain memory blocks to implement large arrays, and also a clock management block to implement sequential systems. Now, let's take a closer look into logic blocks. Once again, this is where you'll find the elements that implement your design. These are also known as configurable logic blocks or CLB's. Each logic block contains a number of logic cells which are smaller groups of basic logic elements. Now here's something that I find interesting. Although the letter G in FPGA stands for Gate, logic cells don't usually contain gates. Let me show you what I mean. Here's a simplified example of a logic cell. It has 3 levels of elements to implement 3 different types of digital applications. The left-most level has lookup tables or LUTs. If you look closely, each of these LUTs has 3 inputs which are connected to inputs a, b and c respectively. These LUTs are hardware implementations of lookup tables or RAs, containing single bits of data. So, for every combination of binary values of a, b and c, there is 1 binary value at the output of each of these LUTs. This means that each of these lookup tables can implement any arbitrary free-input binary function, giving the FPGA a binary function focus, rather than a gate level focus. In the diagram we have a multiplexer that allows us to combine the 3 input lookup tables, to create a 4 input function, if that's what we want. The 2nd level contains a full adder which is a building block for arithmetic. This block can take a carry-bit from another logic cell, and send its own carry result to some other logic cell. Notice the multiplexer at the right of the full adder. This multiplexer allows us to refrain from using the full adder if we don't need it. Now, the 3rd level is a D flip-flop, which is a basic building block for sequential systems, that is, systems that have a notion of time. As usual, you get to choose if you want to use a flip-flop or not, and this is done with the multiplexer at the output. So, in summary, this logic cell enables the FPGA to create logic, arithmetic and sequential applications. Again, this is a simplified example. Real logic cells may have more elements, like other types of flip-flops, D multiplexers, larger lookup tables, small register arrays, and so on.

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