4-bit adder simulation example - FPGA Tutorial

- [Instructor] Now let's take a look at my implementation of the FourBitAdder. This is Quartus Prime, where I'll use the ModelSim simulator. If you take a look at the code, the first thing I want you to notice is in line one where we have the timescale directive indicating that each time step takes one nanosecond and that the resolution of the simulation will be in steps of 100 picoseconds. Now, if you look at line eight, you'll see the instantiation of a FourBitAdder named adder, and it has the usual connections, two registers, A and B, as the inputs, and the Sum wire array and the Cout wire as its outputs, and looking at the simulation, you will see that starting at line 12, we have zero plus zero assigned to A and B. Then after five nanoseconds, we have to add one plus three, then four plus eight, and finally, 12 plus 10. We are interested in seeing how our system behaves and what results it yields from those input values. The stop command in line 17 causes the simulation to stop five nanoseconds after the last assignment. Now, let's take a look at my Adder module. As you can see, starting at line 24, this module is the composition of one half_adder and three full_adders, just like in the schematic we just saw. Take a minute to verify that this code matches the schematic, and what you should be paying attention to is that the carry output of each block is fed into the carry input of the next block. So let's run the simulation, and this is very simple in Quartus. You just have to double-click on the RTL Simulation link. As a result, ModelSim will open as a new application. So the first thing we want to do here is to open a Library tree and browse for the work object, and then, we can choose our device, which is called DE0_CV_golden_top. Next, we get to choose the signals we want to show in the waveform viewer. Let me choose A and B. You just drag and drop. Then the carry output signal and the Sum array. Next, we have to specify how long we want the simulation to run for, and we can do that by entering that duration in this box at the top. Let's run for 30 nanoseconds. Lastly, all that's left to do is to run this simulation. Now we can see the source code with an arrow pointing to the line where the simulation stopped, but we can always go back to the waveform viewer, and this is where we get the results we were looking for. First, let me zoom out, and here, we can see the values represented in binary, and if we want to have a more comfortable view, maybe we should display this in hexadecimal. So the first thing I'll do is combine these two output signals to get a number that's five bits long. You can do that by choosing the Combine Signals menu element, and I will name this new signal Addition, and now, I am free to get rid of these two signals. Now, let me change the Radix to Hexadecimal, and this is it. Now, pay attention to the values shown in the Messages column at the right of the signal names. That column will show the values of the signals at the moment where the cursor is set. So for example, at this point, we have that zero plus zero is zero. At this point, we have that one plus three is four, which is correct. Next, we have that four plus eight equals C, which is also correct because C is the hexadecimal representation for number 12, and lastly, we get that C plus A equals 16, which, again, is correct, and that is because C equals 12, A equals 10, and 16 is the hexadecimal representation for 22.