From the course: Getting Started with RISC-V
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Compressed ISA extension - Raspberry Pi Tutorial
From the course: Getting Started with RISC-V
Compressed ISA extension
- [Instructor] Now, it's time to talk about the RISC-V ISA extension I find the most exciting. This one is the RV32C for compressed. This one adds 34 instructions to the base instruction set, but zero new operations. These 34 additional instructions are actually 16-bit encodings for special cases of a select group of popular RV32I instructions. The purpose of creating special versions of existing instructions at half their encoding size is to reduce the code size of the programs that will be stored in memory. The success in reducing the code size depends greatly on the choice of instructions to compress and how to compress them. So the RISC-V designers conducted a series of experiments to research the features of the code produced by compilers for modern industry applications and came up with three key observations. First, 10 popular CPU registers are used more than the rest. Second, although binary operation instructions…
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