Huma Abidi

By 2026, the conversation shifts from intent to execution, spanning policy, fabs, advanced packaging, talent, and global partnerships. India is no longer just a design hub, it’s positioning itself as a strategic node in the global semiconductor value chain. Here, I have shared my perspective on where India stands today, what’s coming next, and why this moment matters for industry leaders and investors. https://lnkd.in/gSg4s-XZ #Semiconductors #IndiaTech #MakeInIndia #Leadership #ChipIndustry #Innovation

14

How does a startup accelerate development with limited time and resources? At Akeana, co-founder Nitin Rajmohan reveals how Cadence's like Xcelium, Verisium Debug, and Palladium platforms helped them go from simulation to emulation seamlessly, speeding up their development cycle and delivering high-quality IP solutions. Read more: https://ow.ly/20nE30sP3aO

8

I enjoyed joining Patrick Moorhead and Daniel Newman at #MWC26 to discuss how AI is reshaping the network and what that means for compute, architecture, and operators.   Cristina Rodriguez and I shared our perspective on the role of Xeon, why open platforms matter for operators, and how the industry is preparing for the transition toward AI-native 6G.   Appreciate the conversation. 

123

1 Comment

👍 Good Reading this Industry Insight Article: Cost Dynamics Across Pre-Silicon & Post-Silicon in Chip Productization 👉 Read here (chetanpatil.in) 💡💡 My personal take away : Silicon complexity, Customer Expectations, and Why Validation is the last safety net with Shift Left Strategy !! What Post-Silicon Validation Is • Runs on prototype boards with real OS, apps, and stress workloads. • Focuses on system-level correctness (timing, power, interactions). • Complements manufacturing test, which only screens defects. Why It Matters 1. Cost to Fix •  Pre-silicon fix: simulation rerun •  Post-silicon fix: lab debug, re-spin, regression •  Post-launch fix: recalls, lost market share, reputation damage 2. Industry examples: chip errata, recalls, or delayed launches due to missed corner cases.

4

1 Comment

Since joining Intel Lip-Bu has brought a clear vision: rebuild product leadership, deepen customer partnerships, and position Intel as the computing platform of the future. Made in Malaysia 😀

13

1 Comment

In today’s world of massive, complex chips powering AI and high-performance computing, the industry is embracing a deeper “shift left” approach while ensuring no change in later stages re-introduced gaps in the netlist phase. 🚀 This blog explores 5 key trends in RTL signoff that are transforming the design process: 1️⃣ Advanced linting for highest design quality 2️⃣ Advanced Clock and glitch checks to prevent silicon bug escapes 3️⃣ Incremental Netlist CDC signoff complemented by correct-by-construction Synthesis 4️⃣ Cleaner design with cycle-aware RDC 5️⃣ Smarter Debugging of synthesis-optimized registers 📖 Read the full blog to dive deeper into these trends and see how they’re reshaping chip design #RTLSignoff #ShiftLeft #ChipDesign #AI #HPC #EDA #Semiconductors #DesignVerification #CDC #RDC #Linting #RTL #FirstPassSilicon #VCSpyGlass #Synopsys Paras Jain Ajay Singh Amit Goldie Vikas Kamboj Bradley Geden Sanjay Bali sureshbabu barla

13

Synopsys Inc is building the future of #AI driven chip design, today.   Our Engineer Excellence leader Raja Tabet sat down with Noah Labhart from the Code Story Podcast to give the download on everything spanning the Synopsys agentic AI journey to his personal advice to folks earlier in their career.  Listen here – or anywhere podcasts can be found: https://bit.ly/4nJFVg0

23

The developer world is recognizing blazing fast inference is a game changer to enable an entire category of new use cases. The collaboration with AWS will permit many more to understand the true impact of Cerebras CS-3's. Another key milestone for Andrew and the team at building the company. More to come.

10

1 Comment

In Podcast With Subhasish, I spoke with Dhiraj Goswami, CVP & GM at Cadence, sharing insights on #leadership, #innovation, #talent, and #scaling. Watch here: https://lnkd.in/gircqTMu In this #PWS episode, Dhiraj reflects on his journey from hands-on #engineer to executive #leader — highlighting the #habits, #decision making frameworks, and #mindset shifts required to build and lead high-performance #globalteams. With prior leadership roles at Synopsys Inc, Mentor Graphics, and Intel Corporation, he shares lessons from advancing #emulation platforms, strengthening hardware-software #coverification, and driving innovation in machine learning–enabled #EDA solutions. We also discussed why emulation is becoming mission-critical for modern #chipdesign, the rising importance of low-power verification at advanced nodes, and how #ML is transforming engineering productivity across industries. Whether you're an engineer, #student, #industryleader, corporate #executive, or Cadence #employee, this conversation delivers practical insights on #leadership, #technology strategy, #talent building, and the future of complex system innovation. #LeadershipInsights #SemiconductorIndustry #PWS #Cadence #GlobalTeams #CareerInTech

8

While going through the key takeaways from the World Economic Forum 2026 in Davos, I was struck by the scale and clarity of the conversations around India’s role in AI and semiconductors. One theme that truly stood out was India’s holistic vision for AI, spanning applications, indigenous models, semiconductors, infrastructure, and clean energy, a coordinated approach that reflects both ambition and practicality. Leaders highlighted how India is building not just capability but accessible computing infrastructure, anchored by a 38,000‑GPU national compute pool and gigawatt‑scale data centres, to support broad‑based innovation. There was also strong global interest in India’s semiconductor and AI journey, with industry voices expressing confidence in the country’s direction and potential. It’s encouraging to see such a comprehensive approach taking shape, creating meaningful opportunities for innovators, startups, and researchers to contribute to India’s technology journey. Read the full article here: https://lnkd.in/giQ7Xp_B

52

Great insight from Synopsys Inc CEO Sassine Ghazi on the rise of AI and how its reshaping the field of engineering.

27

At Sensors Converge and excited to meet Neil Jacobson, a reputed expert in the Electronics Industry for over 3 decades and talk about his recent experience with AI Agents. Early in my career, I was fortunate to have worked closely with Neil at Xilinx on foundational semiconductor technologies like IEEE 1149.1/IEEE 1532. Neil is the author of "The In-System Configuration Handbook: A Designer's Guide to ISC". Experts agree on the incredible transformational power of AI in the Electronics Industry. And it is happening right now... How are you adopting AI Agents in your workflow? More importantly, how are you ensuring it is reliable, accurate and trustable?

58

2 Comments

AI didn’t just speed things up at Micron-it forced us to rethink how we collaborate, make decisions, and build trust. I joined Anand Bahl and Upen Sachdev and spoke to WSJ CIO Journal about what that shift looks like from the CSO seat. From my perspective, AI only creates value when security, technology, and the business move together from the start. Bolting security on later erodes trust and slows execution. Embedding it early does the opposite-it creates trust by design, enables speed, and gives teams the confidence to move fast without creating unnecessary risk. That’s been a fundamental change in how we operate. In the AI era, CIO‑CSO alignment isn’t about control-it’s about earning trust at scale. The partnership with Anand Bahl reflects a shared belief that responsible AI leadership means enabling innovation while making trust non‑negotiable. AI is a powerful accelerator. Trust, alignment, and execution are what turn it into real advantage. #AI #Trust #Leadership #CyberSecurity #CIO #CSO #Collaboration #DigitalTransformation https://lnkd.in/gPzh5K6n

252

7 Comments

The future of #AI hardware is being shaped by partnerships like Synopsys Inc and Arm. Read Synopsys' latest blog post to learn how the two companies are focusing on AI chips and the multi-die architectures on which they are built.

57

One of the biggest misconceptions in the AI era is assuming everything shifts fully to flash. At hyperscale, architecture decisions are ultimately driven by the balance of performance, scalability, reliability and economics, especially when managing massive volumes of persistent data across cloud and AI environments. The reality is HDDs continue to play a critical role in enabling cost-efficient, large-scale infrastructure, and that balance between SSD and HDD is what makes modern AI and cloud ecosystems sustainable at scale. #WD #AI #Cloud #DataStorage #Hyperscale

5

From Bhilai’s classrooms to the helm of one of India’s most influential semiconductor teams, Navin Bishnoi has lived the journey of turning curiosity into architecture. As 𝗖𝗼𝘂𝗻𝘁𝗿𝘆 𝗛𝗲𝗮𝗱 (𝗠𝗮𝗿𝘃𝗲𝗹𝗹 𝗜𝗻𝗱𝗶𝗮) & 𝗔𝗩�� 𝗗𝗮𝘁𝗮 𝗖𝗲𝗻𝘁𝗲𝗿 𝗘𝗻𝗴𝗶𝗻𝗲𝗲𝗿𝗶𝗻𝗴 at Marvell Technology, he has spent 25+ years designing not just chips, but the systems of trust, ethics, and resilience that power global AI and cloud platforms. In his conversation with IndiSight, he opens up on why leadership is as much about building people and principles as it is about building technology, and why India must raise not just engineers, but architects of the future. Read his story: https://lnkd.in/gxinMgSM IndiSight | Anshul Dubey

292

8 Comments

Ensuring reliable silicon, especially at advanced nodes, needs a methodology that spans the entire silicon life cycle - from design to manufacturing to mission mode usage. The post below from Shankar Krishnamoorthy and Yervant Zorian provides a comprehensive overview of what design teams can do to mitigate and tackle problems such as SILENT DATA CORRUPTION, a problem that becomes infinitely more prominent due to training demands of AI and GenAI. Other interesting links: From Meta: https://lnkd.in/gyeh6f9j From SemiEngineering: https://lnkd.in/g7pFwSVs https://lnkd.in/g6RQ_tX7 #synopsys #reliability #FuSa #3DIC

41

Ethernet is the Backbone of AI Infrastructure. And at Broadcom, we’re building that backbone—across every scale. Our portfolio of AI-optimized Ethernet switches spans the full range of AI datacenter needs—from node-level compute to region-wide scale-out. For scale-up and scale-out. Whether you’re tuning for latency, bandwidth, or network fabric efficiency, we have you covered: 👉Tomahawk Ultra – 51.2 Tbps Purpose-built for HPC and tightly coupled AI training clusters. Offers ultra-low latency at 250ns. It’s how you get deterministic high performance. Perfect for SCALE UP. 👉Tomahawk 6 – 102.4 Tbps The world’s highest-bandwidth Ethernet switch. Doubles the bandwidth of the previous gen while improving power efficiency. Think of it as the core fabric of modern AI systems. Think SCALE OUT. And also SCALE UP. 👉Jericho4 Our go-to switch for AI scale-out across regions. Offers astonishing scale to 36,000 HyperPorts, each operating at 3.2 Tb/s. It’s what connects multi-site AI clusters and ensures global scale with visibility. We’re proudly architecting the open, scalable, power-efficient networks AI will run on for the next decade. #AIInfrastructure #EthernetForAI #ConnectedByBroadcom #Networking

188

1 Comment