Sierra Circuits

EMI sources in PCBs and how to control them 🔶 Electromagnetic interference (EMI) is mainly caused by poor field containment. You can reduce it by designing a stack-up with solid reference planes, minimizing loop areas, and applying filter circuits near noise-prone sections. <-- Swipe left 💡 Read the blog to learn more: https://lnkd.in/gtQ7wFEV --> Repost if you find this useful. #pcbdesign #signalintegrity

In this snippet of Trace Talks, Amit Bahl and Sergiy Nesterenko discuss how PCB manufacturing knowledge could be integrated into automated design tools like Quilter. Today, experienced engineers and manufacturers rely on years of expertise to identify potential fabrication and assembly challenges during the design process. The goal for future automation is to translate that knowledge into quantifiable constraints that algorithms can understand and satisfy. Sergiy explains that manufacturability ultimately comes down to parameters such as spacing, separation distances, proximity, and other measurable design rules. The challenge is capturing this expertise in a way that software can consistently apply during PCB layout. In this discussion, they cover: • The role of manufacturing feedback during PCB development • How fabrication expertise could be translated into design constraints • The challenge of encoding real-world manufacturing knowledge into algorithms • The importance of collaboration between design tools and manufacturers WATCH FULL EPISODE: https://lnkd.in/gM2hwcmH

Hope it ends with version 3. #pcbdesign #pcbfabrication #meme

What PCB designers ask about bill of materials Your circuit board manufacturer requires a comprehensive data package, including a centroid file, an accurate BOM, panelization requirements, and detailed assembly drawings to minimize ambiguity and streamline assembly and production. 💡 Here's an on-demand webinar that can answer most of your questions: https://lnkd.in/ga969S5C --> Repost if you find this useful. #pcbfabrication #pcbassembly

How to design PCBs for data centers and AI servers 🔶 Designing PCBs for AI servers and hyperscale data center platforms requires architectures that support extreme routing density, high-speed serializer/deserializer (SerDes) signaling, and low impedance power delivery. 🔶 Layout engineers and signal integrity experts must adopt HDI for fine-pitch BGAs and select materials that meet the loss budgets of 112G and emerging 224G PAM4 signaling for high-performance computing systems. 🟨 Key takeaways: 1. Use HDI in data center PCBs when BGA pitch ≤0.5 mm or the routing density exceeds the through-hole breakout capability. 2. Design graphics processing unit (GPU) power delivery using multi-phase voltage regulators, low-inductance vias, and strong decoupling to handle sudden high current demands. 3. Select very-low-loss or ultra-low-loss laminates (Df ≤0.004) for 112G/224G PAM4 channels, and reserve modified FR4 for non-critical layers. 4. Use low-profile copper to minimize insertion loss at multi-GHz frequencies. 💡 Read the full article to learn board types used in hyperscale facilities, how to pick materials for 112G/224G signaling, and stack-up and layout techniques for long-term reliability: https://lnkd.in/gk_GRRgu --> Repost if you find this useful. #pcbdesign #datacenters #servers

What's the difference between IPC-6012 and IPC-A-600? 🔶 IPC-6012 provides the performance criteria, whereas IPC-A-600 provides visual illustrations of these requirements, including examples of acceptable and unacceptable conditions. 🔶 In practice, both standards are used together; IPC-6012 defines what must be achieved, while IPC-A-600 confirms that those requirements have been met. This combination ensures consistency between #PCBfabrication and inspection, helping deliver reliable, high-quality circuit boards. 🔶 A correct understanding of these IPC requirements is essential at both design and manufacturing levels to avoid any misinterpretation. 🔶 For example, the fab drawing should specify whether the copper weights mentioned are for the start or finished state. This prevents any rejections due to deviations during the quality check and dispatch of the circuit boards. 💡 Read the full blog for more details: https://lnkd.in/gzz28c3d --> Repost if you find this useful. #pcbdesign #electricalengineering

We’re breaking down the IPC standards that actually impact your board’s performance, manufacturability, and yield (not just theory). Join us on April 8th at 9 AM PT for a free webinar on just what you need to avoid costly design mistakes and get it right the first time. We’ll cover: • What every PCB designer must know about IPC standards • Avoiding expensive design mistakes caused by IPC misinterpretation • Why accurate documentation can make or break your board • Essential IPC standards you can’t ignore at the design stage REGISTER NOW: https://lnkd.in/g8zBXiEa

4 design tips to minimize leakage current in your PCBs 🔶 High-leakage current in PCBs is caused by moisture absorption and inadequate creepage and clearance distances. You can prevent it by maintaining sufficient spacing and selecting a laminate with a CTI greater than 400 V. <-- Swipe left 💡 Read the full blog here: https://lnkd.in/gR6B54Y3 --> Repost if you find this useful. #pcbdesign #pcblayout

In this snippet of Trace Talks, Amit Bahl speaks with Ben Jordan about the final step in the Quilter Project Speedrun PCB development process: preparing a design for fabrication. Once the layout is complete, engineers still need to perform careful cleanup and verification before sending the board to a manufacturer. Ben explains how this process involved reviewing polygons, running design rule checks, and generating a clean manufacturing dataset. For the Project Speedrun prototype boards, the team partnered with Sierra Circuits for fabrication due to their advanced capabilities and the advantage of working with a domestic manufacturer in the same time zone. In this discussion, they cover: • The final cleanup steps before submitting a PCB to fabrication • Running design rule checks (DRC) before manufacturing • Generating a complete ODB++ manufacturing dataset • Why ODB++ includes critical data like the BOM, layer stack, and fabrication images • Choosing a fabrication partner for rapid prototyping WATCH FULL EPISODE: https://lnkd.in/gM2hwcmH

Small layout errors can cause EMI, signal loss, or reliability issues on your medtech board. In this free webinar, we’ll break down the most common mistakes in medical PCB design and how to avoid them: ► Material selection ► Controlled impedance ► EMI control ► DFM for medical devices Join us on April 1st at 9 AM PT: https://lnkd.in/gSRTskUK