Control logic and cell design for a 4K NVRAM
Abstract
A high-density 4K 5-V-only nonvolatile static RAM has been designed using a wafer stepper HMOS I FLOTOX E/SUP 2/PROM technology. Normal SRAM read/write operations and parallel data transfer between SRAM and E/SUP 2/PROM array are possible. On-chip high-voltage regulation and generation, junction leakage control, and self-timing circuitry ensure full military temperature operation. Power-down store lockout protection and power-up automatic recall are featured.
- Publication:
-
IEEE Journal of Solid-State Circuits
- Pub Date:
- October 1983
- DOI:
- Bibcode:
- 1983IJSSC..18..525L
- Keywords:
-
- Logic design;
- Random access memory;
- Nonvolatile memory;
- Temperature;
- Circuits;
- DH-HEMTs;
- Latches;
- Voltage;
- Automatic generation control