phy: xilinx-xhdmiphy: Disable dru_clk in error path

Fix incorrect error path in clock parsing. These warnings are
reported by smatch tool.

warnings:
drivers/phy/xilinx/xhdmiphy.c:755 xhdmiphy_clk_init() warn:
'priv->axi_lite_clk' from clk_prepare_enable() not released on lines: 737.
drivers/phy/xilinx/xhdmiphy.c:755 xhdmiphy_clk_init() warn:
'priv->dru_clk' from clk_prepare_enable() not released on lines: 737.
drivers/phy/xilinx/xhdmiphy.c:755 xhdmiphy_clk_init() warn:
'priv->tmds_clk' from clk_prepare_enable() not released on lines: 737.

Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
Reviewed-by: Vishal Sagar <vishal.sagar@amd.com>

Author: gugulot

drivers/phy/xilinx/xhdmiphy.c

@@ -734,7 +734,7 @@ static int xhdmiphy_clk_init(struct xhdmiphy_dev *priv)
 			if (err) {
 				dev_err(priv->dev,
 					"Cannot set rate : %d\n", err);
-				return err;
+				goto err_disable_dru_clk;
 			}
 			dru_clk_rate = clk_get_rate(priv->dru_clk);
 			dev_dbg(priv->dev,
@@ -747,6 +747,8 @@ static int xhdmiphy_clk_init(struct xhdmiphy_dev *priv)
 
 	return 0;
 
+err_disable_dru_clk:
+	clk_disable_unprepare(priv->dru_clk);
 err_disable_tmds_clk:
 	clk_disable_unprepare(priv->tmds_clk);
 err_disable_axiclk: