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phy: xilinx-xhdmiphy: Fix FRL mode issue with versal devices
Retimer chip needs to be configured always with FRL rate at which link is trained in HDMI 2.1 mode. Fixes: e0409a6 ("phy: xilinx-xhdmiphy: Fix configuring retimer chip in HDMI 2.1 mode") Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com> Reviewed-by: Vishal Sagar <vishal.sagar@amd.com> Message-ID: <1727357990-2698985-1-git-send-email-rajesh.gugulothu@amd.com> State: pending
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‎drivers/phy/xilinx/xhdmiphy.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -235,10 +235,10 @@ static int xhdmiphy_configure(struct phy *phy, union phy_configure_opts *opts)
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frl_mode);
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xhdmiphy_clkdet_freq_reset(phy_dev,
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XHDMIPHY_DIR_TX);
238-
xhdmiphy_set_lrate(phy_dev, phy_lane->direction,
239-
1, cfg->linerate,
240-
cfg->nchannels);
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}
239+
xhdmiphy_set_lrate(phy_dev, phy_lane->direction,
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1, cfg->linerate,
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cfg->nchannels);
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cfg->config_hdmi21 = 0;
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} else if (cfg->resetgtpll) {
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xhdmiphy_set(phy_dev, XHDMIPHY_TX_INIT_REG,

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