drm: xlnx: hdmi: Fix TMDS clock calculation for RGB YUV422 YUV444 formats

In case of 10bpc and above RGB, YUV422 and YUV444 formats are not working
due to the wrong condition check.

As per the HDMI 1.4 specification section 6.5, the color depth for
YUV422 is always 12 bpc, so  pixels are carried at a rate of one
pixel for TMDS clock. TMDS clock calculation for RGB and YUV444
are done based on color depth.

Signed-off-by: Rajesh Gugulothu <rajesh.gugulothu@amd.com>
Reviewed-by: Vishal Sagar <vishal.sagar@amd.com>

Author: gugulot

drivers/gpu/drm/xlnx/xlnx_hdmi.c

@@ -3115,7 +3115,7 @@ static u64 xlnx_hdmi_get_tmdsclk(struct xlnx_hdmi *hdmi, struct drm_display_mode
 	if (hdmi->xvidc_colorfmt == HDMI_TX_CSF_YCRCB_420)
 		tmdsclk = tmdsclk >> 1;
 
-	if (hdmi->xvidc_colorfmt == HDMI_TX_CSF_YCRCB_422) {
+	if (hdmi->xvidc_colorfmt != HDMI_TX_CSF_YCRCB_422) {
 		switch (hdmi->config.bpc) {
 		case HDMI_TX_BPC_10:
 			tmdsclk = (tmdsclk * 5) >> 2;