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| 1 | +/* |
| 2 | + * Copyright (C) 2006-2011 Oracle Corporation |
| 3 | + * |
| 4 | + * This file is part of VirtualBox Open Source Edition (OSE), as |
| 5 | + * available from http://www.virtualbox.org. This file is free software; |
| 6 | + * you can redistribute it and/or modify it under the terms of the GNU |
| 7 | + * General Public License (GPL) as published by the Free Software |
| 8 | + * Foundation, in version 2 as it comes in the "COPYING" file of the |
| 9 | + * VirtualBox OSE distribution. VirtualBox OSE is distributed in the |
| 10 | + * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. |
| 11 | + * -------------------------------------------------------------------- |
| 12 | + * |
| 13 | + * This code is based on: |
| 14 | + * |
| 15 | + * ROM BIOS for use with Bochs/Plex86/QEMU emulation environment |
| 16 | + * |
| 17 | + * Copyright (C) 2002 MandrakeSoft S.A. |
| 18 | + * |
| 19 | + * MandrakeSoft S.A. |
| 20 | + * 43, rue d'Aboukir |
| 21 | + * 75002 Paris - France |
| 22 | + * http://www.linux-mandrake.com/ |
| 23 | + * http://www.mandrakesoft.com/ |
| 24 | + * |
| 25 | + * This library is free software; you can redistribute it and/or |
| 26 | + * modify it under the terms of the GNU Lesser General Public |
| 27 | + * License as published by the Free Software Foundation; either |
| 28 | + * version 2 of the License, or (at your option) any later version. |
| 29 | + * |
| 30 | + * This library is distributed in the hope that it will be useful, |
| 31 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 32 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 33 | + * Lesser General Public License for more details. |
| 34 | + * |
| 35 | + * You should have received a copy of the GNU Lesser General Public |
| 36 | + * License along with this library; if not, write to the Free Software |
| 37 | + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
| 38 | + * |
| 39 | + */ |
| 40 | + |
| 41 | + |
| 42 | +#define ATA_DATA_NO 0x00 |
| 43 | +#define ATA_DATA_IN 0x01 |
| 44 | +#define ATA_DATA_OUT 0x02 |
| 45 | + |
| 46 | +#define ATA_TRANSLATION_NONE 0 |
| 47 | +#define ATA_TRANSLATION_LBA 1 |
| 48 | +#define ATA_TRANSLATION_LARGE 2 |
| 49 | +#define ATA_TRANSLATION_RECHS 3 |
| 50 | + |
| 51 | +#define ATA_IFACE_NONE 0x00 |
| 52 | +#define ATA_IFACE_ISA 0x00 |
| 53 | +#define ATA_IFACE_PCI 0x01 |
| 54 | + |
| 55 | +#define ATA_MODE_NONE 0x00 |
| 56 | +#define ATA_MODE_PIO16 0x00 |
| 57 | +#define ATA_MODE_PIO32 0x01 |
| 58 | +#define ATA_MODE_ISADMA 0x02 |
| 59 | +#define ATA_MODE_PCIDMA 0x03 |
| 60 | +#define ATA_MODE_USEIRQ 0x10 |
| 61 | + |
| 62 | +//@todo: this should be elsewhere, since it's not in fact ATA specific! |
| 63 | +#define ATA_TYPE_NONE 0x00 |
| 64 | +#define ATA_TYPE_UNKNOWN 0x01 |
| 65 | +#define ATA_TYPE_ATA 0x02 |
| 66 | +#define ATA_TYPE_ATAPI 0x03 |
| 67 | +#define ATA_TYPE_SCSI 0x04 // SCSI disk |
| 68 | + |
| 69 | +#define ATA_DEVICE_NONE 0x00 |
| 70 | +#define ATA_DEVICE_HD 0xFF |
| 71 | +#define ATA_DEVICE_CDROM 0x05 |
| 72 | + |
| 73 | + |
| 74 | +// Global defines -- ATA register and register bits. |
| 75 | +// command block & control block regs |
| 76 | +#define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0 |
| 77 | +#define ATA_CB_ERR 1 // error in pio_base_addr1+1 |
| 78 | +#define ATA_CB_FR 1 // feature reg out pio_base_addr1+1 |
| 79 | +#define ATA_CB_SC 2 // sector count in/out pio_base_addr1+2 |
| 80 | +#define ATA_CB_SN 3 // sector number in/out pio_base_addr1+3 |
| 81 | +#define ATA_CB_CL 4 // cylinder low in/out pio_base_addr1+4 |
| 82 | +#define ATA_CB_CH 5 // cylinder high in/out pio_base_addr1+5 |
| 83 | +#define ATA_CB_DH 6 // device head in/out pio_base_addr1+6 |
| 84 | +#define ATA_CB_STAT 7 // primary status in pio_base_addr1+7 |
| 85 | +#define ATA_CB_CMD 7 // command out pio_base_addr1+7 |
| 86 | +#define ATA_CB_ASTAT 6 // alternate status in pio_base_addr2+6 |
| 87 | +#define ATA_CB_DC 6 // device control out pio_base_addr2+6 |
| 88 | +#define ATA_CB_DA 7 // device address in pio_base_addr2+7 |
| 89 | + |
| 90 | +#define ATA_CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC |
| 91 | +#define ATA_CB_ER_BBK 0x80 // ATA bad block |
| 92 | +#define ATA_CB_ER_UNC 0x40 // ATA uncorrected error |
| 93 | +#define ATA_CB_ER_MC 0x20 // ATA media change |
| 94 | +#define ATA_CB_ER_IDNF 0x10 // ATA id not found |
| 95 | +#define ATA_CB_ER_MCR 0x08 // ATA media change request |
| 96 | +#define ATA_CB_ER_ABRT 0x04 // ATA command aborted |
| 97 | +#define ATA_CB_ER_NTK0 0x02 // ATA track 0 not found |
| 98 | +#define ATA_CB_ER_NDAM 0x01 // ATA address mark not found |
| 99 | + |
| 100 | +#define ATA_CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask) |
| 101 | +#define ATA_CB_ER_P_MCR 0x08 // ATAPI Media Change Request |
| 102 | +#define ATA_CB_ER_P_ABRT 0x04 // ATAPI command abort |
| 103 | +#define ATA_CB_ER_P_EOM 0x02 // ATAPI End of Media |
| 104 | +#define ATA_CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication |
| 105 | + |
| 106 | +// ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC) |
| 107 | +#define ATA_CB_SC_P_TAG 0xf8 // ATAPI tag (mask) |
| 108 | +#define ATA_CB_SC_P_REL 0x04 // ATAPI release |
| 109 | +#define ATA_CB_SC_P_IO 0x02 // ATAPI I/O |
| 110 | +#define ATA_CB_SC_P_CD 0x01 // ATAPI C/D |
| 111 | + |
| 112 | +// bits 7-4 of the device/head (CB_DH) reg |
| 113 | +#define ATA_CB_DH_DEV0 0xa0 // select device 0 |
| 114 | +#define ATA_CB_DH_DEV1 0xb0 // select device 1 |
| 115 | + |
| 116 | +// status reg (CB_STAT and CB_ASTAT) bits |
| 117 | +#define ATA_CB_STAT_BSY 0x80 // busy |
| 118 | +#define ATA_CB_STAT_RDY 0x40 // ready |
| 119 | +#define ATA_CB_STAT_DF 0x20 // device fault |
| 120 | +#define ATA_CB_STAT_WFT 0x20 // write fault (old name) |
| 121 | +#define ATA_CB_STAT_SKC 0x10 // seek complete |
| 122 | +#define ATA_CB_STAT_SERV 0x10 // service |
| 123 | +#define ATA_CB_STAT_DRQ 0x08 // data request |
| 124 | +#define ATA_CB_STAT_CORR 0x04 // corrected |
| 125 | +#define ATA_CB_STAT_IDX 0x02 // index |
| 126 | +#define ATA_CB_STAT_ERR 0x01 // error (ATA) |
| 127 | +#define ATA_CB_STAT_CHK 0x01 // check (ATAPI) |
| 128 | + |
| 129 | +// device control reg (CB_DC) bits |
| 130 | +#define ATA_CB_DC_HD15 0x08 // bit should always be set to one |
| 131 | +#define ATA_CB_DC_SRST 0x04 // soft reset |
| 132 | +#define ATA_CB_DC_NIEN 0x02 // disable interrupts |
| 133 | + |
| 134 | +// Most mandatory and optional ATA commands (from ATA-3), |
| 135 | +#define ATA_CMD_CFA_ERASE_SECTORS 0xC0 |
| 136 | +#define ATA_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03 |
| 137 | +#define ATA_CMD_CFA_TRANSLATE_SECTOR 0x87 |
| 138 | +#define ATA_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD |
| 139 | +#define ATA_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38 |
| 140 | +#define ATA_CMD_CHECK_POWER_MODE1 0xE5 |
| 141 | +#define ATA_CMD_CHECK_POWER_MODE2 0x98 |
| 142 | +#define ATA_CMD_DEVICE_RESET 0x08 |
| 143 | +#define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90 |
| 144 | +#define ATA_CMD_FLUSH_CACHE 0xE7 |
| 145 | +#define ATA_CMD_FORMAT_TRACK 0x50 |
| 146 | +#define ATA_CMD_IDENTIFY_DEVICE 0xEC |
| 147 | +#define ATA_CMD_IDENTIFY_DEVICE_PACKET 0xA1 |
| 148 | +#define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xA1 |
| 149 | +#define ATA_CMD_IDLE1 0xE3 |
| 150 | +#define ATA_CMD_IDLE2 0x97 |
| 151 | +#define ATA_CMD_IDLE_IMMEDIATE1 0xE1 |
| 152 | +#define ATA_CMD_IDLE_IMMEDIATE2 0x95 |
| 153 | +#define ATA_CMD_INITIALIZE_DRIVE_PARAMETERS 0x91 |
| 154 | +#define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91 |
| 155 | +#define ATA_CMD_NOP 0x00 |
| 156 | +#define ATA_CMD_PACKET 0xA0 |
| 157 | +#define ATA_CMD_READ_BUFFER 0xE4 |
| 158 | +#define ATA_CMD_READ_DMA 0xC8 |
| 159 | +#define ATA_CMD_READ_DMA_QUEUED 0xC7 |
| 160 | +#define ATA_CMD_READ_MULTIPLE 0xC4 |
| 161 | +#define ATA_CMD_READ_SECTORS 0x20 |
| 162 | +#define ATA_CMD_READ_SECTORS_EXT 0x24 |
| 163 | +#define ATA_CMD_READ_MULTIPLE_EXT 0x29 |
| 164 | +#define ATA_CMD_WRITE_MULTIPLE_EXT 0x39 |
| 165 | +#define ATA_CMD_READ_VERIFY_SECTORS 0x40 |
| 166 | +#define ATA_CMD_RECALIBRATE 0x10 |
| 167 | +#define ATA_CMD_SEEK 0x70 |
| 168 | +#define ATA_CMD_SET_FEATURES 0xEF |
| 169 | +#define ATA_CMD_SET_MULTIPLE_MODE 0xC6 |
| 170 | +#define ATA_CMD_SLEEP1 0xE6 |
| 171 | +#define ATA_CMD_SLEEP2 0x99 |
| 172 | +#define ATA_CMD_STANDBY1 0xE2 |
| 173 | +#define ATA_CMD_STANDBY2 0x96 |
| 174 | +#define ATA_CMD_STANDBY_IMMEDIATE1 0xE0 |
| 175 | +#define ATA_CMD_STANDBY_IMMEDIATE2 0x94 |
| 176 | +#define ATA_CMD_WRITE_BUFFER 0xE8 |
| 177 | +#define ATA_CMD_WRITE_DMA 0xCA |
| 178 | +#define ATA_CMD_WRITE_DMA_QUEUED 0xCC |
| 179 | +#define ATA_CMD_WRITE_MULTIPLE 0xC5 |
| 180 | +#define ATA_CMD_WRITE_SECTORS 0x30 |
| 181 | +#define ATA_CMD_WRITE_SECTORS_EXT 0x34 |
| 182 | +#define ATA_CMD_WRITE_VERIFY 0x3C |
| 183 | + |
| 184 | +// for access to the int13ext structure |
| 185 | +typedef struct { |
| 186 | + uint8_t size; |
| 187 | + uint8_t reserved; |
| 188 | + uint16_t count; |
| 189 | + uint16_t offset; |
| 190 | + uint16_t segment; |
| 191 | + uint32_t lba1; |
| 192 | + uint32_t lba2; |
| 193 | +} int13ext_t; |
| 194 | + |
| 195 | +#define Int13Ext ((int13ext_t *) 0) |
| 196 | + |
| 197 | +// Disk Physical Table definition |
| 198 | +typedef struct { |
| 199 | + uint16_t size; |
| 200 | + uint16_t infos; |
| 201 | + uint32_t cylinders; |
| 202 | + uint32_t heads; |
| 203 | + uint32_t spt; |
| 204 | + uint32_t sector_count1; |
| 205 | + uint32_t sector_count2; |
| 206 | + uint16_t blksize; |
| 207 | + uint16_t dpte_offset; |
| 208 | + uint16_t dpte_segment; |
| 209 | + uint16_t key; |
| 210 | + uint8_t dpi_length; |
| 211 | + uint8_t reserved1; |
| 212 | + uint16_t reserved2; |
| 213 | + uint8_t host_bus[4]; |
| 214 | + uint8_t iface_type[8]; |
| 215 | + uint8_t iface_path[8]; |
| 216 | + uint8_t device_path[8]; |
| 217 | + uint8_t reserved3; |
| 218 | + uint8_t checksum; |
| 219 | +} dpt_t; |
| 220 | + |
| 221 | +#define Int13DPT ((dpt_t *) 0) |
| 222 | + |
| 223 | + |
| 224 | +extern void ata_reset(uint16_t device); |
| 225 | +extern uint16_t atapi_is_cdrom(uint8_t device); |
| 226 | +extern uint16_t ata_cmd_data_in(uint16_t device, uint16_t command, |
| 227 | + uint16_t count, uint16_t cylinder, |
| 228 | + uint16_t head, uint16_t sector, |
| 229 | + uint32_t lba, char __far *buffer); |
| 230 | +extern uint16_t ata_cmd_data_out(uint16_t device, uint16_t command, |
| 231 | + uint16_t count, uint16_t cylinder, |
| 232 | + uint16_t head, uint16_t sector, |
| 233 | + uint32_t lba, char __far *buffer); |
| 234 | +extern uint16_t ata_cmd_packet(uint16_t device, uint8_t cmdlen, |
| 235 | + char __far *cmdbuf, uint16_t header, |
| 236 | + uint32_t length, uint8_t inout, |
| 237 | + char __far *buffer); |
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