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Apr 4, 2016 at 17:35 vote accept Georan
Apr 4, 2016 at 17:34 comment added LvW Yes , -1.6 is corect assuming gm=0.5mS and RD||Rload=3.3k. Perhaps the transconductance gm was larger in your experiment? By the way- up to now we didn`t consider the series resistor at the input (10k). We have a voltage division between 10k and the bias voltage divider.
Apr 4, 2016 at 16:56 comment added Georan Right. And with the capacitor, it is -1.60 (if we ignore ro) which is greater than -1.07 without the capacitor. Does this make sense? I'm not sure about by answer because when I performed this experiment I obtained an output voltage of 2.70V when a 108 mV AC signal was applied, which is a gain of about ~25.
Apr 4, 2016 at 16:50 comment added LvW Without bypassing the source resistor the gain is G=-3.2k/(2k+1k)=-1.066 (assuming gm=0.5mS and ignoring ro).
Apr 4, 2016 at 16:46 comment added LvW The small-signal output resistance of the FET is ro=d(Vds)/d(Id). But this resistance should be listed in the data sheet.
Apr 4, 2016 at 16:28 comment added Georan If I ignore ro in the pi-model, I obtain a gain of -1.60 . Is this the correct gain?
Apr 4, 2016 at 16:06 comment added Georan "equivalent to the inverse slope of the Id=f(VDS) curves, normally in the higher kOhm range" can you please elaborate on this? how would i calculate the output resistance? thanks so much! edit: is it by doing ro = vds / id = 4.2933 V / 1.8074 mA = 2.38 kOhms (these are the experimental values i obtained)?
Apr 4, 2016 at 16:00 history answered LvW CC BY-SA 3.0